foxBMS  1.4.1
The foxBMS Battery Management System API Documentation
spi_cfg-helper.h
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41 
42 /**
43  * @file spi_cfg-helper.h
44  * @author foxBMS Team
45  * @date 2021-12-08 (date of creation)
46  * @updated 2022-10-27 (date of last update)
47  * @version v1.4.1
48  * @ingroup DRIVERS_CONFIGURATION
49  * @prefix SPI
50  *
51  * @brief Headers for the configuration for the SPI module
52  *
53  *
54  */
55 
56 #ifndef FOXBMS__SPI_CFG_HELPER_H_
57 #define FOXBMS__SPI_CFG_HELPER_H_
58 
59 /*========== Includes =======================================================*/
60 #include <stdint.h>
61 
62 /*========== Macros and Definitions =========================================*/
63 /** HW chip select bit position, TMS570LC4357 has maximum of six hardware chip
64  * select pins per SPI node @{ */
65 #define SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION (0u)
66 #define SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION (1u)
67 #define SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION (2u)
68 #define SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION (3u)
69 #define SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION (4u)
70 #define SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION (5u)
71 /**@}*/
72 
73 /** Bit mask to activate hardware chip select in the CSNR field of the SPIDAT1 register */
74 #define SPI_HARDWARE_CHIP_SELECT_ACTIVE (0u)
75 
76 /** Bit mask to *not* activate hardware chip select in the CSNR field of the SPIDAT1 register */
77 #define SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE (1u)
78 
79 /* clang-format off */
80 /* AXIVION Disable Style MisraC2012-2.2: Redundant expressions are kept to enhance code readability */
81 #define SPI_HARDWARE_CHIP_SELECT_DISABLE_ALL \
82  ((uint8_t)( \
83  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
84  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
85  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
86  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
87  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
88  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION) /* CS5 */ \
89  ))
90 /* AXIVION Enable Style MisraC2012-2.2: */
91 /* clang-format on */
92 
93 /* clang-format off */
94 /* AXIVION Disable Style MisraC2012-2.2: Redundant expressions are kept to enhance code readability */
95 #define SPI_HARDWARE_CHIP_SELECT_0_ACTIVE \
96  ((uint8_t)( \
97  (SPI_HARDWARE_CHIP_SELECT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
98  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
99  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
100  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
101  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
102  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION) /* CS5 */ \
103  ))
104 /* AXIVION Enable Style MisraC2012-2.2: */
105 /* clang-format on */
106 
107 /* clang-format off */
108 /* AXIVION Disable Style MisraC2012-2.2: Redundant expressions are kept to enhance code readability */
109 #define SPI_HARDWARE_CHIP_SELECT_1_ACTIVE \
110  ((uint8_t)( \
111  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
112  (SPI_HARDWARE_CHIP_SELECT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
113  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
114  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
115  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
116  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION) /* CS5 */ \
117  ))
118 /* AXIVION Enable Style MisraC2012-2.2: */
119 /* clang-format on */
120 
121 /* clang-format off */
122 /* AXIVION Disable Style MisraC2012-2.2: Redundant expressions are kept to enhance code readability */
123 #define SPI_HARDWARE_CHIP_SELECT_2_ACTIVE \
124  ((uint8_t)( \
125  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
126  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
127  (SPI_HARDWARE_CHIP_SELECT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
128  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
129  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
130  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION) /* CS5 */ \
131  ))
132 /* AXIVION Enable Style MisraC2012-2.2: */
133 /* clang-format on */
134 
135 /* clang-format off */
136 /* AXIVION Disable Style MisraC2012-2.2: Redundant expressions are kept to enhance code readability */
137 #define SPI_HARDWARE_CHIP_SELECT_3_ACTIVE \
138  ((uint8_t)( \
139  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
140  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
141  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
142  (SPI_HARDWARE_CHIP_SELECT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
143  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
144  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION) /* CS5 */ \
145  ))
146 /* AXIVION Enable Style MisraC2012-2.2: */
147 /* clang-format on */
148 
149 /* clang-format off */
150 /* AXIVION Disable Style MisraC2012-2.2: Redundant expressions are kept to enhance code readability */
151 #define SPI_HARDWARE_CHIP_SELECT_4_ACTIVE \
152  ((uint8_t)( \
153  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
154  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
155  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
156  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
157  (SPI_HARDWARE_CHIP_SELECT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
158  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION) /* CS5 */ \
159  ))
160 /* AXIVION Enable Style MisraC2012-2.2: */
161 /* clang-format on */
162 
163 /* clang-format off */
164 /* AXIVION Disable Style MisraC2012-2.2: Redundant expressions are kept to enhance code readability */
165 #define SPI_HARDWARE_CHIP_SELECT_5_ACTIVE \
166  ((uint8_t)( \
167  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_0_BIT_POSITION) | /* CS0 */ \
168  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_1_BIT_POSITION) | /* CS1 */ \
169  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_2_BIT_POSITION) | /* CS2 */ \
170  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_3_BIT_POSITION) | /* CS3 */ \
171  (SPI_HARDWARE_CHIP_SELECT_NOT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_4_BIT_POSITION) | /* CS4 */ \
172  (SPI_HARDWARE_CHIP_SELECT_ACTIVE << SPI_HARDWARE_CHIP_SELECT_5_BIT_POSITION) /* CS5 */ \
173  ))
174 /* AXIVION Enable Style MisraC2012-2.2: */
175 /* clang-format on */
176 
177 /*========== Extern Constant and Variable Declarations ======================*/
178 
179 /*========== Extern Function Prototypes =====================================*/
180 
181 /*========== Externalized Static Functions Prototypes (Unit Test) ===========*/
182 
183 #endif /* FOXBMS__SPI_CFG_HELPER_H_ */