foxBMS - Unit Tests  1.4.0
The foxBMS Unit Tests API Documentation
test_nxpfs85xx.c
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41 
42 /**
43  * @file test_nxpfs85xx.c
44  * @author foxBMS Team
45  * @date 2020-04-06 (date of creation)
46  * @updated 2022-07-28 (date of last update)
47  * @version v1.4.0
48  * @ingroup UNIT_TEST_IMPLEMENTATION
49  * @prefix SBC
50  *
51  * @brief Tests for the sbc module
52  *
53  */
54 
55 /*========== Includes =======================================================*/
56 #include "unity.h"
57 #include "Mockdiag.h"
58 #include "Mockdma.h"
59 #include "Mockfassert.h"
60 #include "Mockfram.h"
61 #include "Mockio.h"
62 #include "Mockmasterinfo.h"
63 #include "Mockmcu.h"
64 #include "Mocksbc_fs8x.h"
65 #include "Mocksbc_fs8x_communication.h"
66 #include "Mockspi.h"
67 
68 #include "nxpfs85xx.h"
69 #include "test_assert_helper.h"
70 
71 /* #include "nxpfs85xx.h" can't be included because of call of FSYS_SwitchToUserMode */
72 
73 TEST_FILE("nxpfs85xx.c")
74 
75 /*========== Definitions and Implementations for Unit Test ==================*/
76 #define REGISTER_TEST_VALUE (1234u)
77 
78 #define MAIN_REGISTER fs85xx_mcuSupervisor.mainRegister
79 #define FAILSAFE_REGISTER fs85xx_mcuSupervisor.fsRegister
80 
81 static const spiDAT1_t spi_kSbcDataConfig = {
82  /* struct is implemented in the TI HAL and uses uppercase true and false */
83  .CS_HOLD = FALSE, /* The HW chip select signal is deactivated */
84  .WDEL = TRUE, /* No delay will be inserted */
85  .DFSEL = SPI_FMT_0, /* Data word format select */
86  .CSNR = 0x0, /* Chip select (CS) number; 0x01h for CS[0] */
87 };
88 
91  .pNode = spiREG2,
92  .pGioPort = &(spiREG2->PC3),
93  .csPin = 0u,
94 };
95 
97  .phase = 0u,
98  .finState = STD_NOT_OK,
99 };
100 
102  return 0;
103 }
104 
105 /*========== Setup and Teardown =============================================*/
106 void setUp(void) {
107 }
108 
109 void tearDown(void) {
110 }
111 
112 /*========== Test Cases =====================================================*/
113 
114 void testDoSomething(void) {
115 }
116 
118  TEST_ASSERT_EQUAL(STD_OK, TEST_SBC_CheckRegisterValues(0u, 0u));
119  TEST_ASSERT_EQUAL(STD_OK, TEST_SBC_CheckRegisterValues(UINT32_MAX, UINT32_MAX));
120  TEST_ASSERT_EQUAL(STD_NOT_OK, TEST_SBC_CheckRegisterValues(0u, 1u));
121  TEST_ASSERT_EQUAL(STD_NOT_OK, TEST_SBC_CheckRegisterValues(0u, UINT32_MAX));
122 }
123 
130 }
131 
161 
162  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.grl_flags, REGISTER_TEST_VALUE + 0u);
163  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.iOvervoltageUndervoltageSafeReaction1, REGISTER_TEST_VALUE + 1u);
164  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.iOvervoltageUndervoltageSafeReaction2, REGISTER_TEST_VALUE + 2u);
165  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.iWatchdogConfiguration, REGISTER_TEST_VALUE + 3u);
166  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.i_safe_inputs, REGISTER_TEST_VALUE + 4u);
167  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.iFailSafeSateMachine, REGISTER_TEST_VALUE + 5u);
168  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.i_svs, REGISTER_TEST_VALUE + 6u);
169  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.watchdogWindow, REGISTER_TEST_VALUE + 7u);
170  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.watchdogSeed, REGISTER_TEST_VALUE + 8u);
171  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.watchdogAnswer, REGISTER_TEST_VALUE + 9u);
172  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.overvoltageUndervoltageRegisterStatus, REGISTER_TEST_VALUE + 10u);
173  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.releaseFs0bPin, REGISTER_TEST_VALUE + 11u);
174  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.safeIos, REGISTER_TEST_VALUE + 12u);
175  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.diag_safety, REGISTER_TEST_VALUE + 13u);
176  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.intb_mask, REGISTER_TEST_VALUE + 14u);
177  TEST_ASSERT_EQUAL(FAILSAFE_REGISTER.states, REGISTER_TEST_VALUE + 15u);
178 }
179 
196 
197  TEST_ASSERT_EQUAL(MAIN_REGISTER.flag, REGISTER_TEST_VALUE + 0u);
198  TEST_ASSERT_EQUAL(MAIN_REGISTER.mode, REGISTER_TEST_VALUE + 1u);
199  TEST_ASSERT_EQUAL(MAIN_REGISTER.registerControl1, REGISTER_TEST_VALUE + 2u);
200  TEST_ASSERT_EQUAL(MAIN_REGISTER.registerControl2, REGISTER_TEST_VALUE + 3u);
201  TEST_ASSERT_EQUAL(MAIN_REGISTER.analogMultiplexer, REGISTER_TEST_VALUE + 4u);
202  TEST_ASSERT_EQUAL(MAIN_REGISTER.clock, REGISTER_TEST_VALUE + 5u);
203  TEST_ASSERT_EQUAL(MAIN_REGISTER.int_mask1, REGISTER_TEST_VALUE + 6u);
204  TEST_ASSERT_EQUAL(MAIN_REGISTER.int_mask2, REGISTER_TEST_VALUE + 7u);
205  TEST_ASSERT_EQUAL(MAIN_REGISTER.flag1, REGISTER_TEST_VALUE + 8u);
206  TEST_ASSERT_EQUAL(MAIN_REGISTER.flag2, REGISTER_TEST_VALUE + 9u);
207  TEST_ASSERT_EQUAL(MAIN_REGISTER.vmon_regx, REGISTER_TEST_VALUE + 10u);
208  TEST_ASSERT_EQUAL(MAIN_REGISTER.lvb1_svs, REGISTER_TEST_VALUE + 11u);
209  TEST_ASSERT_EQUAL(MAIN_REGISTER.memory0, REGISTER_TEST_VALUE + 12u);
210  TEST_ASSERT_EQUAL(MAIN_REGISTER.memory1, REGISTER_TEST_VALUE + 13u);
211  TEST_ASSERT_EQUAL(MAIN_REGISTER.deviceId, REGISTER_TEST_VALUE + 14u);
212 }
@ STD_NOT_OK
Definition: fstd_types.h:83
@ STD_OK
Definition: fstd_types.h:82
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:76
void TEST_SBC_UpdateRegister(FS85_STATE_s *pInstance, bool isFailSafe, uint32_t registerAddress, uint32_t registerValue)
Definition: nxpfs85xx.c:1243
FS85_STATE_s fs85xx_mcuSupervisor
Definition: nxpfs85xx.c:81
STD_RETURN_TYPE_e TEST_SBC_CheckRegisterValues(uint32_t registerValue, uint32_t expectedRegisterValue)
Definition: nxpfs85xx.c:1239
void TEST_SBC_UpdateFailSafeRegister(FS85_FS_REGISTER_s *pFsRegister, uint32_t registerAddress, uint32_t registerValue)
Definition: nxpfs85xx.c:1251
void TEST_SBC_UpdateMainRegister(FS85_MAIN_REGISTERS_s *pMainRegister, uint32_t registerAddress, uint32_t registerValue)
Definition: nxpfs85xx.c:1258
Header for the driver for the FRAM module.
#define FS8X_M_INT_MASK2_ADDR
#define FS8X_M_MEMORY1_ADDR
#define FS8X_FS_WD_ANSWER_ADDR
#define FS8X_M_REG_CTRL2_ADDR
Definition: sbc_fs8x_map.h:696
#define FS8X_FS_RELEASE_FS0B_ADDR
#define FS8X_FS_WD_WINDOW_ADDR
#define FS8X_M_DEVICEID_ADDR
#define FS8X_M_FLAG1_ADDR
#define FS8X_M_VMON_REGX_ADDR
#define FS8X_M_REG_CTRL1_ADDR
Definition: sbc_fs8x_map.h:432
#define FS8X_M_FLAG_ADDR
Definition: sbc_fs8x_map.h:57
#define FS8X_FS_WD_SEED_ADDR
#define FS8X_M_MODE_ADDR
Definition: sbc_fs8x_map.h:304
#define FS8X_FS_I_SAFE_INPUTS_ADDR
#define FS8X_FS_INTB_MASK_ADDR
#define FS8X_FS_SAFE_IOS_ADDR
#define FS8X_M_CLOCK_ADDR
#define FS8X_FS_I_OVUV_SAFE_REACTION1_ADDR
#define FS8X_FS_OVUVREG_STATUS_ADDR
#define FS8X_FS_I_FSSM_ADDR
#define FS8X_FS_I_WD_CFG_ADDR
#define FS8X_FS_DIAG_SAFETY_ADDR
#define FS8X_M_INT_MASK1_ADDR
#define FS8X_FS_I_SVS_ADDR
#define FS8X_M_LVB1_SVS_ADDR
#define FS8X_M_FLAG2_ADDR
#define FS8X_FS_I_OVUV_SAFE_REACTION2_ADDR
#define FS8X_M_AMUX_ADDR
Definition: sbc_fs8x_map.h:882
#define FS8X_FS_STATES_ADDR
#define FS8X_M_MEMORY0_ADDR
#define FS8X_FS_GRL_FLAGS_ADDR
uint8_t phase
Definition: fram_cfg.h:125
FS85_MAIN_REGISTERS_s mainRegister
Definition: nxpfs85xx.h:134
FS85_FS_REGISTER_s fsRegister
Definition: nxpfs85xx.h:135
spiDAT1_t * pConfig
Definition: spi_cfg.h:124
Helper for unit tests.
#define TEST_ASSERT_FAIL_ASSERT(_code_under_test)
assert whether assert macro has failed
SPI_INTERFACE_CONFIG_s spi_kSbcMcuInterface
void testSBC_UpdateRegister(void)
static const spiDAT1_t spi_kSbcDataConfig
#define REGISTER_TEST_VALUE
void testSBC_CheckRegisterValues(void)
#define FAILSAFE_REGISTER
void setUp(void)
void tearDown(void)
void testSBC_UpdateMainRegister(void)
void testSBC_UpdateFailSafeRegister(void)
#define MAIN_REGISTER
long FSYS_RaisePrivilege(void)
Raise privilege.
void testDoSomething(void)
FRAM_SBC_INIT_s fram_sbcInit