foxBMS - Unit Tests  1.2.1
The foxBMS Unit Tests API Documentation
fstartup.c
Go to the documentation of this file.
1 /**
2  *
3  * @copyright © 2010 - 2021, Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright notice, this
12  * list of conditions and the following disclaimer.
13  *
14  * 2. Redistributions in binary form must reproduce the above copyright notice,
15  * this list of conditions and the following disclaimer in the documentation
16  * and/or other materials provided with the distribution.
17  *
18  * 3. Neither the name of the copyright holder nor the names of its
19  * contributors may be used to endorse or promote products derived from
20  * this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  * We kindly request you to use one or more of the following phrases to refer to
34  * foxBMS in your hardware, software, documentation or advertising materials:
35  *
36  * - ″This product uses parts of foxBMS®″
37  * - ″This product includes parts of foxBMS®″
38  * - ″This product is derived from foxBMS®″
39  *
40  */
41 
42 /**
43  * @file fstartup.c
44  * @author foxBMS Team
45  * @date 2020-07-09 (date of creation)
46  * @updated 2020-07-09 (date of last update)
47  * @ingroup GENERAL
48  * @prefix NONE
49  *
50  * @brief Startup code
51  *
52  * @details This file contains startup code mostly identical to TI code.
53  * Function "_c_int00" is extracted from file "HL_sys_startup.c" and
54  * function "getResetSourceWithoutFlagReset" is taken from file
55  * "HL_system.c". Both files are generated by Halcogen under the
56  * following license:
57  *
58  * Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
59  *
60  * Redistribution and use in source and binary forms, with or without
61  * modification, are permitted provided that the following conditions
62  * are met:
63  *
64  * Redistributions of source code must retain the above copyright
65  * notice, this list of conditions and the following disclaimer.
66  *
67  * Redistributions in binary form must reproduce the above copyright
68  * notice, this list of conditions and the following disclaimer in the
69  * documentation and/or other materials provided with the
70  * distribution.
71  *
72  * Neither the name of Texas Instruments Incorporated nor the names of
73  * its contributors may be used to endorse or promote products derived
74  * from this software without specific prior written permission.
75  *
76  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
77  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
78  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
79  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
80  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
81  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
82  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
83  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
84  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
85  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
86  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
87  *
88  */
89 
90 /*========== Includes =======================================================*/
91 /* clang-format off */
92 #include "HL_sys_common.h"
93 #include "HL_system.h"
94 #include "HL_sys_vim.h"
95 #include "HL_sys_core.h"
96 #include "HL_esm.h"
97 #include "HL_sys_mpu.h"
98 #include "HL_errata_SSWF021_45.h"
99 
100 #include "main.h"
101 
102 
103 /*========== Macros and Definitions =========================================*/
104 /* --------- START - Must be consistent with HL_sys_startup.c - START -------*/
105 
106 /** initialize global variable and constructors */
107 extern void __TI_auto_init(void);
108 /** exit application */
109 extern void exit(int _status);
110 /** handler for a failed PLL lock */
111 void handlePLLLockFail(void);
112 /* Startup Routine */
113 void _c_int00(void);
114 /** number of retries for the PLL to come up */
115 #define PLL_RETRIES 5U
116 
117 /* ----------- END - Must be consistent with HL_sys_startup.c - END ---------*/
118 
119 /*========== Static Constant and Variable Definitions =======================*/
120 
121 /*========== Extern Constant and Variable Definitions =======================*/
122 
123 /*========== Static Function Prototypes =====================================*/
124 /**
125  * @brief Get reset flag
126  * @details Get reset source without reseting respective the flag in SYSESR
127  * register
128  * @return returns reset reason
129  */
130 static resetSource_t getResetSourceWithoutFlagReset(void);
131 
132 /*========== Static Function Implementations ================================*/
134 {
135  register resetSource_t rst_source;
136 
137  if ((SYS_EXCEPTION & (uint32)POWERON_RESET) != 0U)
138  {
139  /* power-on reset condition */
140  rst_source = POWERON_RESET;
141  }
142  else if ((SYS_EXCEPTION & (uint32)EXT_RESET) != 0U)
143  {
144  /*** Check for other causes of EXT_RESET that would take precedence **/
145  if ((SYS_EXCEPTION & (uint32)OSC_FAILURE_RESET) != 0U)
146  {
147  /* Reset caused due to oscillator failure. Add user code here to handle oscillator failure */
148  rst_source = OSC_FAILURE_RESET;
149  }
150  else if ((SYS_EXCEPTION & (uint32)WATCHDOG_RESET) !=0U)
151  {
152  /* Reset caused due watchdog violation */
153  rst_source = WATCHDOG_RESET;
154  }
155  else if ((SYS_EXCEPTION & (uint32)WATCHDOG2_RESET) !=0U)
156  {
157  /* Reset caused due watchdog violation */
158  rst_source = WATCHDOG2_RESET;
159  }
160  else if ((SYS_EXCEPTION & (uint32)SW_RESET) != 0U)
161  {
162  /* Reset caused due to software reset. */
163  rst_source = SW_RESET;
164  }
165  else
166  {
167  /* Reset caused due to External reset. */
168  rst_source = EXT_RESET;
169  }
170  }
171  else if ((SYS_EXCEPTION & (uint32)DEBUG_RESET) !=0U)
172  {
173  /* Reset caused due Debug reset request */
174  rst_source = DEBUG_RESET;
175  }
176  else if ((SYS_EXCEPTION & (uint32)CPU0_RESET) !=0U)
177  {
178  /* Reset caused due to CPU0 reset. CPU reset can be caused by CPU self-test completion, or by toggling the "CPU RESET" bit of the CPU Reset Control Register. */
179  rst_source = CPU0_RESET;
180  }
181  else
182  {
183  /* No_reset occured. */
184  rst_source = NO_RESET;
185  }
186  return rst_source;
187 }
188 
189 /*========== Extern Function Implementations ================================*/
190 /** system entry point */
191 #pragma CODE_STATE(_c_int00, 32)
192 #pragma INTERRUPT(_c_int00, RESET)
193 /* SourceId : STARTUP_SourceId_001 */
194 /* DesignId : STARTUP_DesignId_001 */
195 /* Requirements : HL_CONQ_STARTUP_SR1 */
196 void _c_int00(void)
197 {
198  register resetSource_t rstSrc;
199 
200  /* Initialize Core Registers to avoid CCM Error */
201  _coreInitRegisters_();
202 
203  /* Initialize Stack Pointers */
204  _coreInitStackPointer_();
205 
206  /* Reset handler: the following instructions read from the system exception status register
207  * to identify the cause of the CPU reset.
208  */
209  /* Changed in comparison to TI _c_int00 implementation. Readout flags but do NOT clear them! */
211  switch(rstSrc)
212  {
213  case POWERON_RESET:
214  /* Initialize L2RAM to avoid ECC errors right after power on */
215  _memInit_();
216 
217  /* Add condition to check whether PLL can be started successfully */
218  if (_errata_SSWF021_45_both_plls(PLL_RETRIES) != 0U)
219  {
220  /* Put system in a safe state */
222  }
223 
224  case DEBUG_RESET:
225  case EXT_RESET:
226 
227  /* Initialize L2RAM to avoid ECC errors right after power on */
228  if(rstSrc != POWERON_RESET)
229  {
230  _memInit_();
231  }
232 
233  /* Enable CPU Event Export */
234  /* This allows the CPU to signal any single-bit or double-bit errors detected
235  * by its ECC logic for accesses to program flash or data RAM.
236  */
237  _coreEnableEventBusExport_();
238 
239  /* Check if there were ESM group3 errors during power-up.
240  * These could occur during eFuse auto-load or during reads from flash OTP
241  * during power-up. Device operation is not reliable and not recommended
242  * in this case. */
243  if ((esmREG->SR1[2]) != 0U)
244  {
245  esmGroup3Notification(esmREG,esmREG->SR1[2]);
246  }
247 
248  /* Initialize System - Clock, Flash settings with Efuse self check */
249  systemInit();
250 
251  /* Enable IRQ offset via Vic controller */
252  _coreEnableIrqVicOffset_();
253 
254  /* Initialize VIM table */
255  vimInit();
256 
257  /* Configure system response to error conditions signaled to the ESM group1 */
258  /* This function can be configured from the ESM tab of HALCoGen */
259  esmInit();
260  break;
261 
262  case OSC_FAILURE_RESET:
263  break;
264 
265  case WATCHDOG_RESET:
266  case WATCHDOG2_RESET:
267 
268  break;
269 
270  case CPU0_RESET:
271  /* Enable CPU Event Export */
272  /* This allows the CPU to signal any single-bit or double-bit errors detected
273  * by its ECC logic for accesses to program flash or data RAM.
274  */
275  _coreEnableEventBusExport_();
276  break;
277 
278  case SW_RESET:
279  break;
280 
281  default:
282  break;
283  }
284 
285  _mpuInit_();
286 
287  /* initialize global variable and constructors */
288  __TI_auto_init();
289 
290  /* call the application */
291  main();
292 
293  /* AXIVION Next Line Style MisraC2012-21.8: exit is called as in generated code by TI */
294  exit(0);
295 }
296 
297 
298 /** @fn void handlePLLLockFail(void)
299 * @brief This function handles PLL lock fail.
300 */
302 {
303  while(1)
304  {
305 
306  }
307 }
308 
309 /*========== Externalized Static Function Implementations (Unit Test) =======*/
310 
311 /* clang-format on */
void _c_int00(void)
Definition: fstartup.c:196
static resetSource_t getResetSourceWithoutFlagReset(void)
Get reset flag.
Definition: fstartup.c:133
#define PLL_RETRIES
Definition: fstartup.c:115
void handlePLLLockFail(void)
This function handles PLL lock fail.
Definition: fstartup.c:301
void __TI_auto_init(void)
void exit(int _status)
Main function header.
int main(void)
main function of foxBMS
Definition: main.c:87