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foxBMS
1.0.0
The foxBMS Battery Management System API Documentation
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Go to the documentation of this file.
114 uint16_t lengthPayload);
179 uint16_t message_length,
180 uint8_t extend_message);
187 uint16_t lengthPayload) {
192 if ((command % 2u) == 0u) {
197 for (uint16_t i = 0u; i < lengthPayload; i++) {
208 if (lengthPayload != 0u) {
231 if ((command % 2u) != 0u) {
247 uint8_t mxm_spi_temp_buffer[10] = {0};
251 mxm_spi_temp_buffer[2] = 0x00;
252 mxm_spi_temp_buffer[3] = 0x80;
253 mxm_spi_temp_buffer[4] = pInstance->
regConfig1;
254 mxm_spi_temp_buffer[5] = pInstance->
regConfig2;
255 mxm_spi_temp_buffer[6] = pInstance->
regConfig3;
263 uint16_t message_length,
264 uint8_t extend_message) {
274 pInstance->
spiTXBuffer[1] = message_length + extend_message;
279 if (i < message_length) {
295 uint16_t payloadLength,
296 uint8_t extendMessageBytes,
298 uint16_t rxBufferLength,
307 }
else if ((pPayload ==
NULL_PTR) && (payloadLength != 0u)) {
309 }
else if ((payloadLength == 0u) && (pPayload !=
NULL_PTR)) {
311 }
else if ((pRxBuffer ==
NULL_PTR) && (rxBufferLength != 0u)) {
313 }
else if ((rxBufferLength == 0u) && (pRxBuffer !=
NULL_PTR)) {
319 pInstance->
state = state;
332 pInstance->
state = state;
357 switch (registerFunction) {
401 switch (registerFunction) {
440 switch (pInstance->
state) {
467 for (uint8_t i = 0; i < 7u; i++) {
631 if (i < pInstance->rxBufferLength) {
#define MXM_BUF_RD_NXT_MSG
Read receive buffer starting at the oldest unread message.
@ MXM_41B_VERSION_REQUEST_REGISTER
@ MXM_41B_REG_FUNCTION_RX_ERROR_INT
uint16_t spiRXBuffer[100]
#define MXM_REG_FMEA_R
FMEA register read address.
const uint8_t mxm_kRXInterruptEnableRXErrorRXOverflow41BRegister
standard configuration for register rx interrupt
STD_RETURN_TYPE_e MXM_GetSPIStateReady(void)
Return whether SPI interface is ready.
void MXM_41BStateMachine(MXM_41B_INSTANCE_s *pInstance)
Execute state-machine for the MAX17841B.
@ MXM_STATEMACH_41B_CLEAR_TRANSMIT_BUFFER
STD_RETURN_TYPE_e MXM_41BWriteRegisterFunction(MXM_41B_INSTANCE_s *pInstance, MXM_41B_REG_FUNCTION_e registerFunction, MXM_41B_REG_BIT_VALUE value)
Write a register function.
Headers for the driver for the MAX17841B ASCI and MAX1785x monitoring chip.
@ MXM_41B_UART_WRITE_LOAD_QUEUE
Register map of the MAX17841 bridge IC.
static STD_RETURN_TYPE_e MXM_41BBufferWrite(MXM_41B_INSTANCE_s *pInstance, uint16_t *pMessage, uint16_t message_length, uint8_t extend_message)
Write a buffer transaction to MAX17841B.
enum STD_RETURN_TYPE STD_RETURN_TYPE_e
@ MXM_STATEMACH_41B_MAXSTATE
MXM_41B_SUBSTATES_e substate
STD_RETURN_TYPE_e MXM_41BSetStateRequest(MXM_41B_INSTANCE_s *pInstance, MXM_STATEMACH_41B_e state, uint16_t *pPayload, uint16_t payloadLength, uint8_t extendMessageBytes, uint16_t *pRxBuffer, uint16_t rxBufferLength, MXM_41B_STATE_REQUEST_STATUS_e *processed)
Set state transition for MAX17841B-state-machine.
uint16_t spiTXBuffer[MXM_SPI_TX_BUFFER_LENGTH]
#define MXM_REG_RX_INTERRUPT_ENABLE_R
RX interrupt enable register read address.
@ MXM_41B_REG_FUNCTION_RX_BUSY_STATUS
@ MXM_STATEMACH_41B_UART_TRANSACTION
uint8_t MXM_41B_REG_ADD_t
MAX17841B register addresses.
@ MXM_41B_REG_FUNCTION_RX_EMPTY_STATUS
uint8_t extendMessageBytes
@ MXM_41B_REG_FUNCTION_KEEP_ALIVE
const uint8_t mxm_kConfig3KeepAlive160us41BRegister
standard configuration for register config 3
@ MXM_STATEMACH_41B_READ_STATUS_REGISTER
enum MXM_41B_STATE_REQUEST_STATUS MXM_41B_STATE_REQUEST_STATUS_e
Request status of MAX17841B states.
enum MXM_41B_REG_FUNCTION MXM_41B_REG_FUNCTION_e
Register functions.
@ MXM_STATEMACH_41B_UNINITIALIZED
@ MXM_41B_READ_STATUS_REGISTER_SEND
@ MXM_41B_REG_FUNCTION_RX_OVERFLOW_INT
#define MXM_BUF_RD_LD_Q_0
Read load queue starting from location 0.
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
#define MXM_BUF_WR_LD_Q_0
Write load queue starting from location 0.
@ MXM_41B_UART_READ_BACK_RECEIVE_BUFFER_SAVE
@ MXM_STATEMACH_41B_WRITE_CONF_AND_INT_REGISTER
@ MXM_41B_UART_READ_LOAD_QUEUE
@ MXM_STATEMACH_41B_GET_VERSION
@ MXM_41B_REG_FUNCTION_RX_STOP_STATUS
@ MXM_41B_FMEA_REQUEST_REGISTER
@ MXM_41B_INIT_READ_CONFIG_REGISTERS
MXM_STATEMACH_41B_e state
MXM_41B_STATE_REQUEST_STATUS_e * processed
Struct for the state-variable of state-machine.
@ MXM_41B_STATE_PROCESSED
enum MXM_STATEMACH_41B MXM_STATEMACH_41B_e
States of the MAX17841B state-machine.
#define MXM_REG_RX_STATUS_R
RX status register read address.
STD_RETURN_TYPE_e MXM_41BReadRegisterFunction(MXM_41B_INSTANCE_s *pInstance, MXM_41B_REG_FUNCTION_e registerFunction, MXM_41B_REG_BIT_VALUE *pValue)
Read the value of a register function.
STD_RETURN_TYPE_e MXM_ReceiveData(uint16_t *txBuffer, uint16_t *rxBuffer, uint16_t length)
Send and Receive data over SPI.
#define MXM_REG_MODEL_R
Model register read address.
@ MXM_41B_INIT_WRITE_DEFAULT_VALUES
@ MXM_41B_UART_WAIT_FOR_RX_STATUS_CHANGE_WRITE
@ MXM_41B_REG_FUNCTION_TX_PREAMBLES
#define MXM_BUF_WR_NXT_LD_Q_0
Select next load queue and write starting from location 0.
@ MXM_41B_STATE_UNPROCESSED
#define MXM_BUF_CLR_RX_BUF
Reset receive buffer and pointers to default state.
const uint8_t mxm_kConfig2EnableTransmitPreamblesMode41BRegister
standard configuration for register config 2
#define NULL_PTR
Null pointer.
static STD_RETURN_TYPE_e MXM_41BRegisterRead(MXM_41B_INSTANCE_s *pInstance, MXM_41B_REG_ADD_t command, uint16_t *pRxBuffer, uint16_t length)
Read one or multiple registers of MAX17841B.
@ MXM_41B_UART_WAIT_FOR_RX_STATUS_CHANGE_READ_AND_READ_BACK_RCV_BUF
static const uint8_t mxm_41B_reg_default_values[7]
Default values for the configuration and interrupt registers.
@ MXM_STATEMACH_41B_CHECK_FMEA
static STD_RETURN_TYPE_e MXM_41BConfigRegisterWrite(MXM_41B_INSTANCE_s *pInstance)
Write the config register of MAX17841B.
@ MXM_41B_READ_STATUS_REGISTER_PROCESS
STD_RETURN_TYPE_e MXM_SendData(uint16_t *txBuffer, uint16_t length)
Transmit data over SPI.
#define FAS_TRAP
Define that evaluates to essential boolean false thus tripping an assert.
#define MXM_SPI_TX_BUFFER_LENGTH
SPI TX buffer length.
@ MXM_41B_UART_VERIFY_LOAD_QUEUE_AND_TRANSMIT
#define MXM_BUF_CLR_TX_BUF
Reset transmit buffer to default state and clear TX_Q and LD_Q.
@ MXM_41B_INIT_CHECK_INITIALIZATION
#define MXM_REG_RX_INTERRUPT_ENABLE_W
RX interrupt enable register write address.
@ MXM_STATEMACH_41B_CLEAR_RECEIVE_BUFFER
static STD_RETURN_TYPE_e MXM_41BRegisterWrite(MXM_41B_INSTANCE_s *pInstance, MXM_41B_REG_ADD_t command, uint8_t *pPayload, uint16_t lengthPayload)
Write one or multiple registers of MAX17841B.