foxBMS  1.0.0
The foxBMS Battery Management System API Documentation
mxm_battery_management.c
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41 
42 /**
43  * @file mxm_battery_management.c
44  * @author foxBMS Team
45  * @date 2019-01-14 (date of creation)
46  * @updated 2020-09-10 (date of last update)
47  * @ingroup DRIVERS
48  * @prefix MXM
49  *
50  * @brief Driver for the MAX17841B ASCI and MAX1785x monitoring chip
51  *
52  * @details def
53  *
54  */
55 
56 /*========== Includes =======================================================*/
57 #include "mxm_battery_management.h"
58 
59 /*========== Macros and Definitions =========================================*/
60 
61 /** length of the helloall command @{*/
62 #define HELLOALL_TX_LENGTH (3u)
63 #define HELLOALL_RX_LENGTH HELLOALL_TX_LENGTH
64 /**@}*/
65 
66 /*========== Static Constant and Variable Definitions =======================*/
67 
68 /*========== Extern Constant and Variable Definitions =======================*/
69 
70 /*========== Static Function Prototypes =====================================*/
71 
72 /**
73  * @brief Clear the command-buffer.
74  * @details Clears #MXM_5X_INSTANCE_s::commandBuffer by writing 0x00 to every entry.
75  * @param[in,out] pInstance pointer to the state-struct
76  * @return always return #STD_OK
77  */
78 static void MXM_5XClearCommandBuffer(MXM_5X_INSTANCE_s *pInstance);
79 
80 /**
81  * @brief Check if a register address is user accessible
82  * @details Checks if a register address is inside the user accessible memory
83  * range. This range is specified in the datasheet of the monitoring
84  * IC as following:
85  * - user memory is contained in the range 0x00 to 0x98
86  * - reserved addresses in the user address space are:
87  * - 0x2C, 0x2D, 0x2E, 0x2F
88  * - 0x46
89  * - 0x84 through 0x8B
90  * @param[in] regAddress register address to be checked
91  * @return #STD_OK if the register address is good, otherwise #STD_NOT_OK
92  */
93 static STD_RETURN_TYPE_e MXM_5XIsUserAccessibleRegister(uint8_t regAddress);
94 
95 /**
96  * @brief Check if a register address is user accessible in MAX17852
97  * @details Checks if a register address is inside the user accessible memory
98  * range.
99  * This range is specified in the datasheet of the monitoring IC.
100  * @param[in] regAddress register address to be checked
101  * @return #STD_OK if the register address is good, otherwise #STD_NOT_OK
102  */
103 static STD_RETURN_TYPE_e MXM_52IsUserAccessibleRegister(uint8_t regAddress);
104 
105 /**
106  * @brief Check if a register address is user accessible in MAX17853
107  * @details Checks if a register address is inside the user accessible memory
108  * range.
109  * This range is specified in the datasheet of the monitoring IC as
110  * the following:
111  * - user memory is contained in the range 0x00 to 0x98
112  * - reserved addresses in the user address space are:
113  * - 0x2C, 0x2D, 0x2E, 0x2F
114  * - 0x46
115  * - 0x84 through 0x8B
116  * @param[in] regAddress register address to be checked
117  * @return #STD_OK if the register address is good, otherwise #STD_NOT_OK
118  */
119 static STD_RETURN_TYPE_e MXM_53IsUserAccessibleRegister(uint8_t regAddress);
120 
121 /**
122  * @brief clears the command buffer and writes HELLOALL into the buffer
123  * @details Fills the command buffer with a HELLOALL message after having it
124  * cleaned.
125  * @param[in,out] pInstance pointer to the state-struct
126  */
128 
129 /**
130  * @brief clears the command buffer and writes WRITEALL into the buffer
131  * @details Fills the command buffer with a WRITEALL command. This command
132  * writes the same lsb and msb to every satellite in the daisy-chain
133  * in the same register.
134  * @param[in,out] pInstance pointer to the state-struct
135  * @param[in] regAddress address of the register that should be written
136  * @param[in] dataLSB LSB of the register that should be written
137  * @param[in] dataMSB MSB of the register that should be written
138  * @return #STD_OK if an accessible register address has been selected,
139  * #STD_NOT_OK if not.
140  */
142  MXM_5X_INSTANCE_s *pInstance,
143  uint8_t regAddress,
144  uint8_t dataLSB,
145  uint8_t dataMSB);
146 
147 /**
148  * @brief clears the command buffer and writes a WRITEDEVICE message
149  * @details Fills the command buffer with a WRITEDEVICE message. This message
150  * is addressed to one specific device in the daisy-chain. Therefore
151  * the address of the device has to be supplied together with the
152  * register and the data that should be written.
153  * @param[in,out] pInstance pointer to the state-struct
154  * @param[in] deviceAddress address for the satellite that should be
155  * written to
156  * @param[in] regAddress address of the register that should be written
157  * @param[in] dataLSB LSB of the register that should be written
158  * @param[in] dataMSB MSB of the register that should be written
159  * @return #STD_OK if an accessible register address has been selected,
160  * #STD_NOT_OK if not.
161  */
163  MXM_5X_INSTANCE_s *pInstance,
164  uint8_t deviceAddress,
165  uint8_t regAddress,
166  uint8_t dataLSB,
167  uint8_t dataMSB);
168 
169 /**
170  * @brief clears the command buffer and writes READALL into the buffer
171  * @details Fills the command buffer with a READALL command. This command
172  * retrieves the LSB and MSB of exactly one register of every device
173  * in the daisy-chain.
174  * @param[in,out] pInstance pointer to the state-struct
175  * @param[in] regAddress address of the register that should be read
176  * @return #STD_OK if an accessible register address has been selected,
177  * #STD_NOT_OK if not.
178  */
179 static STD_RETURN_TYPE_e MXM_5XConstructCommandBufferReadall(MXM_5X_INSTANCE_s *pInstance, uint8_t regAddress);
180 
181 /*========== Static Function Implementations ================================*/
183  for (uint8_t i = 0; i < COMMAND_BUFFER_LENGTH; i++) {
184  pInstance->commandBuffer[i] = 0x00U;
185  }
187  return;
188 }
189 
191  STD_RETURN_TYPE_e retval = STD_OK;
192  /* check if regAddress is in user-accessible area */
193  if (regAddress <= 0x98U) {
194  /* overall range is good, check for exceptions */
195 
196  /* TODO make selectable, this block is for MAX17853 */
197  /* if ((regAddress == 0x46U) ||
198  ((0x2CU <= regAddress) && (regAddress <= 0x2FU)) ||
199  ((0x84U <= regAddress) && (regAddress <= 0x8BU))) {
200  */
201  /* regAddress is inside one of the exceptions */
202  /*
203  retval = STD_NOT_OK;
204  }
205  */
206 
207  /* MAX17852 */
208  if ((regAddress == 0x5DU) || (regAddress == 0x5EU)) {
209  retval = STD_NOT_OK;
210  }
211 
212  } else {
213  /* regAddress is outside user-accessible range */
214  retval = STD_NOT_OK;
215  }
216  return retval;
217 }
218 
220  STD_RETURN_TYPE_e retval = STD_OK;
221  /* check if regAddress is in user-accessible area */
222  if (regAddress <= 0x98U) {
223  /* overall range is good, check for exceptions */
224  /* MAX17852 */
225  if ((regAddress == 0x5DU) || (regAddress == 0x5EU)) {
226  retval = STD_NOT_OK;
227  }
228  } else {
229  /* regAddress is outside user-accessible range */
230  retval = STD_NOT_OK;
231  }
232  return retval;
233 }
234 
236  STD_RETURN_TYPE_e retval = STD_OK;
237  /* check if regAddress is in user-accessible area */
238  if (regAddress <= 0x98U) {
239  /* overall range is good, check for exceptions */
240  if ((regAddress == 0x46U) || ((0x2CU <= regAddress) && (regAddress <= 0x2FU)) ||
241  ((0x84U <= regAddress) && (regAddress <= 0x8BU))) {
242  /* regAddress is inside one of the exceptions */
243  retval = STD_NOT_OK;
244  }
245  } else {
246  /* regAddress is outside user-accessible range */
247  retval = STD_NOT_OK;
248  }
249  return retval;
250 }
251 
253  MXM_5XClearCommandBuffer(pInstance);
255  pInstance->commandBuffer[1] = 0x00;
256  pInstance->commandBuffer[2] = HELLOALL_START_SEED;
257  pInstance->commandBufferCurrentLength = 3;
258  return;
259 }
260 
262  MXM_5X_INSTANCE_s *pInstance,
263  uint8_t regAddress,
264  uint8_t dataLSB,
265  uint8_t dataMSB) {
266  STD_RETURN_TYPE_e retval = STD_NOT_OK;
267 
268  if (MXM_5XIsUserAccessibleRegister(regAddress) == STD_OK) {
269  /* clear command buffer */
270  MXM_5XClearCommandBuffer(pInstance);
271 
272  /* construct command buffer */
274  pInstance->commandBuffer[1] = regAddress;
275  pInstance->commandBuffer[2] = dataLSB;
276  pInstance->commandBuffer[3] = dataMSB;
277  /* PEC byte */
278  pInstance->commandBuffer[4] = MXM_CRC8(pInstance->commandBuffer, 4);
279  /* TODO alive-counter? */
280  pInstance->commandBufferCurrentLength = 5;
281  retval = STD_OK;
282  }
283 
284  return retval;
285 }
286 
288  MXM_5X_INSTANCE_s *pInstance,
289  uint8_t deviceAddress,
290  uint8_t regAddress,
291  uint8_t dataLSB,
292  uint8_t dataMSB) {
293  STD_RETURN_TYPE_e retval = STD_NOT_OK;
294 
295  if (MXM_5XIsUserAccessibleRegister(regAddress) == STD_OK) {
296  /* clear command buffer */
297  MXM_5XClearCommandBuffer(pInstance);
298 
299  /* construct command buffer */
300 
301  /* commandBuffer[0] = Device address in a daisy chain + 0b100
302  * DA = deviceAddress
303  * Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
304  * Content | DA[4] | DA[3] | DA[2] | DA[1] | DA[0] | 1 | 0 | 0
305  */
306  pInstance->commandBuffer[0] = ((deviceAddress << 3) & 0xF8u) | BATTERY_MANAGEMENT_WRITEDEVICE;
307  pInstance->commandBuffer[1] = regAddress;
308  pInstance->commandBuffer[2] = dataLSB;
309  pInstance->commandBuffer[3] = dataMSB;
310  /* PEC byte */
311  pInstance->commandBuffer[4] = MXM_CRC8(pInstance->commandBuffer, 4);
312  /* TODO alive-counter? */
313  pInstance->commandBufferCurrentLength = 5;
314  retval = STD_OK;
315  }
316 
317  return retval;
318 }
319 
321  STD_RETURN_TYPE_e retval = STD_NOT_OK;
322  /* TODO test these functions */
323 
324  if (MXM_5XIsUserAccessibleRegister(regAddress) == STD_OK) {
325  /* clear command buffer */
326  MXM_5XClearCommandBuffer(pInstance);
327 
328  /* construct command buffer */
330  pInstance->commandBuffer[1] = regAddress;
331  pInstance->commandBuffer[2] = DATA_CHECK_BYTE_SEED;
332  /* PEC byte */
333  pInstance->commandBuffer[3] = MXM_CRC8(pInstance->commandBuffer, 3);
334  /* TODO alive-counter? */
335  pInstance->commandBufferCurrentLength = 4;
336  retval = STD_OK;
337  }
338 
340  /* define containing command buffer length does
341  * not match actual buffer */
342  retval = STD_NOT_OK;
343  }
344 
345  return retval;
346 }
347 
348 /*========== Extern Function Implementations ================================*/
349 
350 extern STD_RETURN_TYPE_e MXM_5XGetRXBuffer(MXM_5X_INSTANCE_s *pInstance, uint8_t *rxBuffer, uint16_t rxBufferLength) {
351  STD_RETURN_TYPE_e retval = STD_OK;
352 
353  if ((rxBuffer != NULL_PTR) && (rxBufferLength != 0u)) {
354  for (uint16_t i = 0; i < rxBufferLength; i++) {
355  if (i < MXM_5X_RX_BUFFER_LEN) {
356  rxBuffer[i] = pInstance->rxBuffer[i];
357  } else {
358  rxBuffer[i] = 0;
359  }
360  }
361  } else {
362  retval = STD_NOT_OK;
363  }
364 
365  return retval;
366 }
367 
369  return (MXM_DC_BYTE_e)pInstance->lastDCByte;
370 }
371 
372 extern uint8_t MXM_5XGetNumberOfSatellites(MXM_5X_INSTANCE_s *pInstance) {
373  return pInstance->numberOfSatellites;
374 }
375 
377  return pInstance->numberOfSatellitesIsGood;
378 }
379 
381  MXM_5X_INSTANCE_s *pInstance5x,
382  MXM_STATEMACHINE_5X_e state,
383  MXM_5X_COMMAND_PAYLOAD_s commandPayload,
384  MXM_5X_STATE_REQUEST_STATUS_e *processed) {
385  STD_RETURN_TYPE_e retval = STD_OK;
386  if (state >= MXM_STATEMACH_5X_MAXSTATE) {
387  retval = STD_NOT_OK;
388  } else if (processed == NULL_PTR) {
389  retval = STD_NOT_OK;
390  } else if (pInstance5x->state == MXM_STATEMACH_5X_UNINITIALIZED) {
391  if (state == MXM_STATEMACH_5X_INIT) {
392  pInstance5x->state = state;
393  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
394  pInstance5x->commandPayload = commandPayload;
395  pInstance5x->processed = processed;
396  *pInstance5x->processed = MXM_5X_STATE_UNPROCESSED;
397  } else {
398  retval = STD_NOT_OK;
399  }
400  } else if (pInstance5x->state == MXM_STATEMACH_5X_IDLE) {
401  pInstance5x->state = state;
402  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
403  pInstance5x->commandPayload = commandPayload;
404  pInstance5x->processed = processed;
405  *pInstance5x->processed = MXM_5X_STATE_UNPROCESSED;
406  } else {
407  retval = STD_NOT_OK;
408  }
409  return retval;
410 }
411 
412 void MXM_5XStateMachine(MXM_41B_INSTANCE_s *pInstance41b, MXM_5X_INSTANCE_s *pInstance5x) {
413  STD_RETURN_TYPE_e retval;
414  switch (pInstance5x->state) {
416  /* pInstance5x->state = MXM_STATEMACH_5X_INIT;
417  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;*/
418  break;
420  /* TODO idle state */
421  break;
423  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
424  /* entry of state --> set to first substate */
425  pInstance5x->substate = MXM_5X_41B_FMEA_REQUEST;
426  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
427  }
428 
429  if (pInstance5x->substate == MXM_5X_41B_FMEA_REQUEST) {
430  retval = MXM_41BSetStateRequest(
431  pInstance41b, MXM_STATEMACH_41B_CHECK_FMEA, NULL_PTR, 0, 0, NULL_PTR, 0, &pInstance5x->status41b);
432  if (retval == STD_OK) {
433  pInstance5x->substate = MXM_5X_41B_FMEA_CHECK;
434  } else {
435  /* stay here */
436  }
437  } else if (pInstance5x->substate == MXM_5X_41B_FMEA_CHECK) {
438  if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
439  /* wait for processing
440  * TODO implement timeout? */
441  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
442  *pInstance5x->processed = MXM_5X_STATE_ERROR;
443  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
444  /* TODO continue */
445  *pInstance5x->processed = MXM_5X_STATE_PROCESSED;
446  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
447  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
448  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
449  } else {
451  }
452  } else {
453  /* something is very broken */
454  *pInstance5x->processed = MXM_5X_STATE_ERROR;
455  }
456  break;
458  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
459  /* entry of state --> set to first substate */
460  pInstance5x->substate = MXM_5X_INIT_41B_INIT;
461  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
462  }
463 
464  if (pInstance5x->substate == MXM_5X_INIT_41B_INIT) {
465  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
466  retval = MXM_41BSetStateRequest(
467  pInstance41b, MXM_STATEMACH_41B_INIT, NULL_PTR, 0, 0, NULL_PTR, 0, &pInstance5x->status41b);
468  if (retval == STD_NOT_OK) {
469  /* TODO error handling */
470  }
471  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
472  /* wait for processing
473  * TODO implement timeout? */
474  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
475  /* TODO error handling */
476  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
477  /* TODO continue */
479  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
480  } else {
482  }
483  } else if (pInstance5x->substate == MXM_5X_INIT_ENABLE_KEEP_ALIVE) {
484  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
487  if (retval == STD_OK) {
488  retval = MXM_41BSetStateRequest(
489  pInstance41b,
491  NULL_PTR,
492  0,
493  0,
494  NULL_PTR,
495  0,
496  &pInstance5x->status41b);
497  }
498  if (retval == STD_NOT_OK) {
499  /* TODO error handling */
500  }
501  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
502  /* wait for processing
503  * TODO implement timeout? */
504  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
505  /* TODO error handling */
506  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
507  /* TODO continue */
509  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
510  } else {
512  }
513  } else if (pInstance5x->substate == MXM_5X_INIT_ENABLE_RX_INTERRUPT_FLAGS) {
514  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
515  retval =
517  if (retval == STD_NOT_OK) {
518  /* TODO error handling */
519  }
522  if (retval == STD_OK) {
523  retval = MXM_41BSetStateRequest(
524  pInstance41b,
526  NULL_PTR,
527  0,
528  0,
529  NULL_PTR,
530  0,
531  &pInstance5x->status41b);
532  }
533  if (retval == STD_NOT_OK) {
534  /* TODO error handling */
535  }
536  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
537  /* wait for processing
538  * TODO implement timeout? */
539  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
540  /* TODO error handling */
541  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
542  /* TODO continue */
544  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
545  } else {
547  }
549  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
550  retval = MXM_41BSetStateRequest(
551  pInstance41b,
553  NULL_PTR,
554  0,
555  0,
556  NULL_PTR,
557  0,
558  &pInstance5x->status41b);
559  if (retval == STD_NOT_OK) {
560  /* TODO error handling */
561  }
562  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
563  /* wait for processing
564  * TODO implement timeout? */
565  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
566  /* TODO error handling */
567  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
568  /* TODO continue */
569  /* TODO next step */
571  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
572  } else {
574  }
576  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
577  retval =
579  if (retval == STD_OK) {
580  retval = MXM_41BSetStateRequest(
581  pInstance41b,
583  NULL_PTR,
584  0,
585  0,
586  NULL_PTR,
587  0,
588  &pInstance5x->status41b);
589  }
590  if (retval == STD_NOT_OK) {
591  /* TODO error handling */
592  }
593  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
594  /* wait for processing
595  * TODO implement timeout? */
596  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
597  /* TODO error handling */
598  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
600  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
601  } else {
603  }
605  /* TODO wait for rx status change busy */
606  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
607  retval = MXM_41BSetStateRequest(
608  pInstance41b,
610  NULL_PTR,
611  0,
612  0,
613  NULL_PTR,
614  0,
615  &pInstance5x->status41b);
616  if (retval == STD_NOT_OK) {
617  /* TODO error handling */
618  }
619  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
620  /* wait for processing
621  * TODO implement timeout? */
622  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
623  /* TODO error handling */
624  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
625  MXM_41B_REG_BIT_VALUE functionValue;
626  retval =
628  if (retval == STD_NOT_OK) {
629  /* TODO this should not happen, did we use the right enum? */
630  } else {
631  if (functionValue == MXM_41B_REG_FALSE) {
632  /* repeat this state */
633  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
634  } else if (functionValue == MXM_41B_REG_TRUE) {
636  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
637  } else {
639  }
640  }
641  } else {
643  }
645  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
648  if (retval == STD_OK) {
649  retval = MXM_41BSetStateRequest(
650  pInstance41b,
652  NULL_PTR,
653  0,
654  0,
655  NULL_PTR,
656  0,
657  &pInstance5x->status41b);
658  }
659  if (retval == STD_NOT_OK) {
660  /* TODO error handling */
661  }
662  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
663  /* wait for processing
664  * TODO implement timeout? */
665  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
666  /* TODO error handling */
667  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
669  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
670  } else {
672  }
674  /* TODO wait for rx status change busy */
675  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
676  retval = MXM_41BSetStateRequest(
677  pInstance41b,
679  NULL_PTR,
680  0,
681  0,
682  NULL_PTR,
683  0,
684  &pInstance5x->status41b);
685  if (retval == STD_NOT_OK) {
686  /* TODO error handling */
687  }
688  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
689  /* wait for processing
690  * TODO implement timeout? */
691  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
692  /* TODO error handling */
693  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
694  MXM_41B_REG_BIT_VALUE functionValue;
695  retval =
697  if (retval == STD_NOT_OK) {
698  /* TODO this should not happen, did we use the right enum? */
699  } else {
700  if (functionValue == MXM_41B_REG_TRUE) {
701  /* repeat this state until rx_empty_status is 0 */
702  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
703  } else if (functionValue == MXM_41B_REG_FALSE) {
705  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
706  } else {
708  }
709  }
710  } else {
712  }
714  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
715  retval = MXM_41BSetStateRequest(
716  pInstance41b,
718  NULL_PTR,
719  0,
720  0,
721  NULL_PTR,
722  0,
723  &pInstance5x->status41b);
724  if (retval == STD_NOT_OK) {
725  /* TODO error handling */
726  }
727  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
728  /* wait for processing
729  * TODO implement timeout? */
730  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
731  /* TODO error handling */
732  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
734  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
735  } else {
737  }
739  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
740  retval = MXM_41BSetStateRequest(
741  pInstance41b,
743  NULL_PTR,
744  0,
745  0,
746  NULL_PTR,
747  0,
748  &pInstance5x->status41b);
749  if (retval == STD_NOT_OK) {
750  /* TODO error handling */
751  }
752  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
753  /* wait for processing
754  * TODO implement timeout? */
755  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
756  /* TODO error handling */
757  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
759  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
760  } else {
762  }
763  } else if (pInstance5x->substate == MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_HELLOALL) {
764  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
766  retval = MXM_41BSetStateRequest(
767  pInstance41b,
769  pInstance5x->commandBuffer,
770  pInstance5x->commandBufferCurrentLength,
771  0,
772  pInstance5x->rxBuffer,
774  &pInstance5x->status41b);
775  if (retval == STD_NOT_OK) {
776  /* TODO error handling */
777  }
778  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
779  /* wait for processing
780  * TODO implement timeout? */
781  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
782  /* reset state-machine */
783  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
784  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
786  } else {
788  }
789  /* TODO check for receive buffer errors and handle */
791  /* check if the commandBuffer matches with the receive buffer */
792  retval = STD_OK;
793  for (uint8_t i = 0u; i < (pInstance5x->commandBufferCurrentLength - 1u); i++) {
794  if (pInstance5x->commandBuffer[i] != pInstance5x->rxBuffer[i]) {
795  retval = STD_NOT_OK;
796  }
797  }
798  /* update number of satellites
799  */
800  pInstance5x->numberOfSatellites = pInstance5x->rxBuffer[HELLOALL_RX_LENGTH - 1u] - HELLOALL_START_SEED;
801 
802  /*
803  * Plausibility check, compare with preset number of satellites
804  */
805  if (pInstance5x->numberOfSatellites == (BS_NR_OF_MODULES * BS_NR_OF_STRINGS)) {
806  pInstance5x->numberOfSatellitesIsGood = STD_OK;
807  }
808 
809  if (retval == STD_NOT_OK) {
810  /* TODO error handling */
811  } else {
812  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
813  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
814  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
815  *pInstance5x->processed = MXM_5X_STATE_PROCESSED;
816  }
817  } else {
818  /* something is very broken */
819  *pInstance5x->processed = MXM_5X_STATE_ERROR;
820  }
821  break;
823  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
824  /* entry of state --> set to first substate */
826  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
827  }
828 
829  if (pInstance5x->substate == MXM_5X_WRITEALL_UART_TRANSACTION) {
830  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
832  pInstance5x,
833  pInstance5x->commandPayload.regAddress,
834  pInstance5x->commandPayload.lsb,
835  pInstance5x->commandPayload.msb);
836  retval = MXM_41BSetStateRequest(
837  pInstance41b,
839  pInstance5x->commandBuffer,
840  pInstance5x->commandBufferCurrentLength,
841  0,
842  pInstance5x->rxBuffer,
843  pInstance5x->commandBufferCurrentLength,
844  &pInstance5x->status41b);
845  /* TODO check CRC */
846  if (retval == STD_NOT_OK) {
847  /* TODO error handling */
848  }
849  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
850  /* wait for processing
851  * TODO implement timeout? */
852  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
853  /* reset state-machine */
854  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
855  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
856  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
857  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
858  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
859  *pInstance5x->processed = MXM_5X_STATE_PROCESSED; /* TODO continue */
860  } else {
862  }
863  }
864  break;
866  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
867  /* entry of state --> set to first substate */
869  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
870  }
871 
872  if (pInstance5x->substate == MXM_5X_WRITE_DEVICE_UART_TRANSACTION) {
873  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
875  pInstance5x,
876  pInstance5x->commandPayload.deviceAddress,
877  pInstance5x->commandPayload.regAddress,
878  pInstance5x->commandPayload.lsb,
879  pInstance5x->commandPayload.msb);
880  retval = MXM_41BSetStateRequest(
881  pInstance41b,
883  pInstance5x->commandBuffer,
884  pInstance5x->commandBufferCurrentLength,
885  0,
886  pInstance5x->rxBuffer,
887  pInstance5x->commandBufferCurrentLength,
888  &pInstance5x->status41b);
889  if (retval == STD_NOT_OK) {
890  *pInstance5x->processed = MXM_5X_STATE_ERROR;
891  }
892  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
893  /* wait for processing */
894  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
895  /* reset state-machine */
896  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
897  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
898  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
899  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
900  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
901  *pInstance5x->processed = MXM_5X_STATE_PROCESSED; /* TODO continue and check CRC */
902  } else {
903  /* This should never happen */
904  *pInstance5x->processed = MXM_5X_STATE_ERROR;
905  }
906  }
907  break;
909  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
910  /* entry of state --> set to first substate */
912  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
913  }
914 
915  if (pInstance5x->substate == MXM_5X_READALL_UART_TRANSACTION) {
916  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
918  /* TODO parse rx buffer here into values and parse CRC before passing on*/
919  /* stretch message length in order to accommodate 2 bytes per satellite */
920  retval = MXM_41BSetStateRequest(
921  pInstance41b,
923  pInstance5x->commandBuffer,
924  pInstance5x->commandBufferCurrentLength,
925  2u * pInstance5x->numberOfSatellites,
926  pInstance5x->rxBuffer,
928  &pInstance5x->status41b);
929 
930  if (retval == STD_NOT_OK) {
931  /* TODO error handling */
932  }
933  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
934  /* wait for processing
935  * TODO implement timeout? */
936  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
937  /* reset state-machine */
938  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
939  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
940  pInstance5x->substate = MXM_5X_READALL_CHECK_CRC;
941  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
942  } else {
944  }
945  } else if (pInstance5x->substate == MXM_5X_READALL_CHECK_CRC) {
946  /* check CRC */
947  if (MXM_CRC8(
948  pInstance5x->rxBuffer,
949  pInstance5x->commandBufferCurrentLength + (2u * pInstance5x->numberOfSatellites)) == 0x00u) {
950  pInstance5x->substate = MXM_5X_READALL_GET_DC;
951  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
952  } else {
953  *pInstance5x->processed = MXM_5X_STATE_ERROR;
954  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
955  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
956  }
957  } else if (pInstance5x->substate == MXM_5X_READALL_GET_DC) {
958  /* get DC */ /* TODO check DC in this state */
959  /* dc byte position is after data */
960  uint8_t dc_byte_position = 2u + (2u * pInstance5x->numberOfSatellites);
961 
962  pInstance5x->lastDCByte = pInstance5x->rxBuffer[dc_byte_position];
963 
964  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
965  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
966  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
967  *pInstance5x->processed = MXM_5X_STATE_PROCESSED; /* TODO continue */
968  } else {
969  /* something is very broken */
970  *pInstance5x->processed = MXM_5X_STATE_ERROR;
971  }
972  break;
973  default:
975  break;
976  }
977 
978  return;
979 }
980 
982  STD_RETURN_TYPE_e retval = STD_NOT_OK;
983  STD_RETURN_TYPE_e retval_check0 = STD_NOT_OK;
984  STD_RETURN_TYPE_e retval_check1 = STD_NOT_OK;
985  STD_RETURN_TYPE_e retval_check2 = STD_NOT_OK;
986  STD_RETURN_TYPE_e retval_check3 = STD_NOT_OK;
987  STD_RETURN_TYPE_e retval_check4 = STD_NOT_OK;
988  STD_RETURN_TYPE_e retval_check5 = STD_NOT_OK;
989  STD_RETURN_TYPE_e retval_check6 = STD_NOT_OK;
990  STD_RETURN_TYPE_e retval_check7 = STD_NOT_OK;
991  STD_RETURN_TYPE_e retval_check8 = STD_NOT_OK;
992  STD_RETURN_TYPE_e retval_check9 = STD_OK;
993  STD_RETURN_TYPE_e retval_check10 = STD_OK;
994  STD_RETURN_TYPE_e retval_check11 = STD_OK;
995  STD_RETURN_TYPE_e retval_check12 = STD_OK;
996  STD_RETURN_TYPE_e retval_check13 = STD_OK;
997  STD_RETURN_TYPE_e retval_check14 = STD_OK;
998 
999  /* check:
1000  * - user memory is contained in range 0x00 to 0x98
1001  * - reserved addresses in user address space:
1002  * 0x2C, 0x2D, 0x2E, 0x2F, 0x46 and 0x84 through 0x8B */
1003 
1004  /* expected #STD_OK */
1005  retval_check0 = MXM_5XIsUserAccessibleRegister(0x00U);
1006  retval_check1 = MXM_5XIsUserAccessibleRegister(0x42U);
1007  retval_check2 = MXM_5XIsUserAccessibleRegister(0x98U);
1008 
1009  retval_check3 = MXM_52IsUserAccessibleRegister(0x00U);
1010  retval_check4 = MXM_52IsUserAccessibleRegister(0x42U);
1011  retval_check5 = MXM_52IsUserAccessibleRegister(0x98U);
1012 
1013  retval_check6 = MXM_53IsUserAccessibleRegister(0x00U);
1014  retval_check7 = MXM_53IsUserAccessibleRegister(0x42U);
1015  retval_check8 = MXM_53IsUserAccessibleRegister(0x98U);
1016 
1017  /* expected #STD_NOT_OK */
1018  retval_check9 = MXM_53IsUserAccessibleRegister(0x2CU);
1019  retval_check10 = MXM_53IsUserAccessibleRegister(0x2EU);
1020  retval_check11 = MXM_53IsUserAccessibleRegister(0x2FU);
1021  retval_check12 = MXM_53IsUserAccessibleRegister(0x46U);
1022  retval_check13 = MXM_53IsUserAccessibleRegister(0x84U);
1023  retval_check14 = MXM_53IsUserAccessibleRegister(0x8BU);
1024 
1025  if ((retval_check0 == STD_OK) && (retval_check1 == STD_OK) && (retval_check2 == STD_OK) &&
1026  (retval_check3 == STD_OK) && (retval_check4 == STD_OK) && (retval_check5 == STD_OK) &&
1027  (retval_check6 == STD_OK) && (retval_check7 == STD_OK) && (retval_check8 == STD_OK) &&
1028  (retval_check9 == STD_NOT_OK) && (retval_check10 == STD_NOT_OK) && (retval_check11 == STD_NOT_OK) &&
1029  (retval_check12 == STD_NOT_OK) && (retval_check13 == STD_NOT_OK) && (retval_check14 == STD_NOT_OK)) {
1030  retval = STD_OK;
1031  }
1032  return retval;
1033 }
1034 
1035 /*========== Externalized Static Function Implementations (Unit Test) =======*/
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_WAIT_FOR_RX_STATUS_EMPTY
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_WAIT_FOR_RX_STATUS_EMPTY
Definition: mxm_battery_management.h:188
MXM_STATEMACH_41B_INIT
@ MXM_STATEMACH_41B_INIT
Definition: mxm_17841b.h:82
DATA_CHECK_BYTE_SEED
#define DATA_CHECK_BYTE_SEED
Definition: mxm_battery_management.h:79
MXM_5X_INIT_41B_INIT
@ MXM_5X_INIT_41B_INIT
Definition: mxm_battery_management.h:169
MXM_5X_ENTRY_SUBSTATE
@ MXM_5X_ENTRY_SUBSTATE
Definition: mxm_battery_management.h:167
MXM_5X_INSTANCE
5x statemachine structure
Definition: mxm_battery_management.h:251
MXM_41B_REG_FUNCTION_RX_ERROR_INT
@ MXM_41B_REG_FUNCTION_RX_ERROR_INT
Definition: mxm_17841b.h:139
MXM_5XConstructCommandBufferWriteDevice
static STD_RETURN_TYPE_e MXM_5XConstructCommandBufferWriteDevice(MXM_5X_INSTANCE_s *pInstance, uint8_t deviceAddress, uint8_t regAddress, uint8_t dataLSB, uint8_t dataMSB)
clears the command buffer and writes a WRITEDEVICE message
Definition: mxm_battery_management.c:287
HELLOALL_RX_LENGTH
#define HELLOALL_RX_LENGTH
Definition: mxm_battery_management.c:63
MXM_5X_INSTANCE::processed
MXM_5X_STATE_REQUEST_STATUS_e * processed
Definition: mxm_battery_management.h:255
MXM_STATEMACH_41B_CLEAR_TRANSMIT_BUFFER
@ MXM_STATEMACH_41B_CLEAR_TRANSMIT_BUFFER
Definition: mxm_17841b.h:90
MXM_5X_INSTANCE::substate
MXM_5X_SUBSTATES_e substate
Definition: mxm_battery_management.h:253
BS_NR_OF_MODULES
#define BS_NR_OF_MODULES
number of modules in battery pack
Definition: battery_system_cfg.h:96
MXM_41BWriteRegisterFunction
STD_RETURN_TYPE_e MXM_41BWriteRegisterFunction(MXM_41B_INSTANCE_s *pInstance, MXM_41B_REG_FUNCTION_e registerFunction, MXM_41B_REG_BIT_VALUE value)
Write a register function.
Definition: mxm_17841b.c:347
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_RECEIVE_BUFFER_2
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_RECEIVE_BUFFER_2
Definition: mxm_battery_management.h:192
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_HELLOALL_VERIFY_MSG_AND_COUNT
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_HELLOALL_VERIFY_MSG_AND_COUNT
Definition: mxm_battery_management.h:196
MXM_5X_INIT_ENABLE_KEEP_ALIVE
@ MXM_5X_INIT_ENABLE_KEEP_ALIVE
Definition: mxm_battery_management.h:172
STD_RETURN_TYPE_e
enum STD_RETURN_TYPE STD_RETURN_TYPE_e
MXM_STATEMACH_5X_41B_FMEA_CHECK
@ MXM_STATEMACH_5X_41B_FMEA_CHECK
Definition: mxm_battery_management.h:154
MXM_41BSetStateRequest
STD_RETURN_TYPE_e MXM_41BSetStateRequest(MXM_41B_INSTANCE_s *pInstance, MXM_STATEMACH_41B_e state, uint16_t *pPayload, uint16_t payloadLength, uint8_t extendMessageBytes, uint16_t *pRxBuffer, uint16_t rxBufferLength, MXM_41B_STATE_REQUEST_STATUS_e *processed)
Set state transition for MAX17841B-state-machine.
Definition: mxm_17841b.c:291
BATTERY_MANAGEMENT_READALL
#define BATTERY_MANAGEMENT_READALL
READALL message (read single register of all daisy-chain devices)
Definition: mxm_battery_management.h:119
COMMAND_BUFFER_LENGTH
#define COMMAND_BUFFER_LENGTH
Definition: mxm_battery_management.h:71
MXM_5XUserAccessibleAddressSpaceCheckerSelfCheck
STD_RETURN_TYPE_e must_check_return MXM_5XUserAccessibleAddressSpaceCheckerSelfCheck(void)
runs a selfcheck for the address space check
Definition: mxm_battery_management.c:981
MXM_STATEMACH_5X_UNINITIALIZED
@ MXM_STATEMACH_5X_UNINITIALIZED
Definition: mxm_battery_management.h:152
MXM_41B_REG_FUNCTION_RX_BUSY_STATUS
@ MXM_41B_REG_FUNCTION_RX_BUSY_STATUS
Definition: mxm_17841b.h:134
MXM_DC_BYTE_e
enum MXM_DC_BYTE MXM_DC_BYTE_e
MXM_5X_STATE_REQUEST_STATUS_e
MXM_5X_STATE_REQUEST_STATUS_e
Request status of Battery Management Protocol states.
Definition: mxm_battery_management.h:229
MXM_STATEMACH_41B_UART_TRANSACTION
@ MXM_STATEMACH_41B_UART_TRANSACTION
Definition: mxm_17841b.h:88
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_WAIT_FOR_RX_STATUS_BUSY
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_WAIT_FOR_RX_STATUS_BUSY
Definition: mxm_battery_management.h:183
MXM_5X_STATE_ERROR
@ MXM_5X_STATE_ERROR
Definition: mxm_battery_management.h:234
MXM_41B_REG_FUNCTION_RX_EMPTY_STATUS
@ MXM_41B_REG_FUNCTION_RX_EMPTY_STATUS
Definition: mxm_17841b.h:136
MXM_5X_INSTANCE::commandBufferCurrentLength
uint8_t commandBufferCurrentLength
Length of Command Buffer.
Definition: mxm_battery_management.h:298
MXM_5X_INIT_ENABLE_RX_INTERRUPT_FLAGS
@ MXM_5X_INIT_ENABLE_RX_INTERRUPT_FLAGS
Definition: mxm_battery_management.h:174
BATTERY_MANAGEMENT_HELLOALL
#define BATTERY_MANAGEMENT_HELLOALL
HELLOALL message.
Definition: mxm_battery_management.h:94
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_HELLOALL
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_HELLOALL
Definition: mxm_battery_management.h:194
MXM_41B_REG_FUNCTION_KEEP_ALIVE
@ MXM_41B_REG_FUNCTION_KEEP_ALIVE
Definition: mxm_17841b.h:138
mxm_kConfig3KeepAlive160us41BRegister
const uint8_t mxm_kConfig3KeepAlive160us41BRegister
standard configuration for register config 3
Definition: mxm_17841b.c:84
MXM_STATEMACH_41B_READ_STATUS_REGISTER
@ MXM_STATEMACH_41B_READ_STATUS_REGISTER
Definition: mxm_17841b.h:87
MXM_5X_STATE_UNPROCESSED
@ MXM_5X_STATE_UNPROCESSED
Definition: mxm_battery_management.h:231
MXM_STATEMACH_5X_WRITEALL
@ MXM_STATEMACH_5X_WRITEALL
Definition: mxm_battery_management.h:156
MXM_41B_REG_FUNCTION_RX_OVERFLOW_INT
@ MXM_41B_REG_FUNCTION_RX_OVERFLOW_INT
Definition: mxm_17841b.h:140
FAS_ASSERT
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
Definition: fassert.h:237
MXM_STATEMACH_5X_WRITE_DEVICE
@ MXM_STATEMACH_5X_WRITE_DEVICE
Definition: mxm_battery_management.h:157
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_TRANSMIT_BUFFER
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_TRANSMIT_BUFFER
Definition: mxm_battery_management.h:190
MXM_5X_COMMAND_PAYLOAD_s::regAddress
MXM_REG_NAME_e regAddress
Definition: mxm_battery_management.h:241
MXM_5X_41B_FMEA_REQUEST
@ MXM_5X_41B_FMEA_REQUEST
Definition: mxm_battery_management.h:198
MXM_5X_INSTANCE::numberOfSatellites
uint8_t numberOfSatellites
Number of satellites.
Definition: mxm_battery_management.h:265
MXM_STATEMACH_5X_MAXSTATE
@ MXM_STATEMACH_5X_MAXSTATE
Definition: mxm_battery_management.h:159
MXM_CRC8
uint8_t MXM_CRC8(uint16_t *pData, int32_t lenData)
Compute CRC8 with initial value set to 0x00.
Definition: mxm_crc8.c:117
MXM_STATEMACH_5X_INIT
@ MXM_STATEMACH_5X_INIT
Definition: mxm_battery_management.h:153
must_check_return
#define must_check_return
Allows functions to generate warnings in GCC for unused returns.
Definition: general.h:95
MXM_5X_READALL_CHECK_CRC
@ MXM_5X_READALL_CHECK_CRC
Definition: mxm_battery_management.h:216
STD_OK
@ STD_OK
Definition: fstd_types.h:72
MXM_5XSetStateRequest
STD_RETURN_TYPE_e MXM_5XSetStateRequest(MXM_5X_INSTANCE_s *pInstance5x, MXM_STATEMACHINE_5X_e state, MXM_5X_COMMAND_PAYLOAD_s commandPayload, MXM_5X_STATE_REQUEST_STATUS_e *processed)
Set state request for the Battery Management Statemachine.
Definition: mxm_battery_management.c:380
MXM_STATEMACH_41B_WRITE_CONF_AND_INT_REGISTER
@ MXM_STATEMACH_41B_WRITE_CONF_AND_INT_REGISTER
Definition: mxm_17841b.h:86
MXM_5X_41B_FMEA_CHECK
@ MXM_5X_41B_FMEA_CHECK
Definition: mxm_battery_management.h:201
MXM_5XGetNumberOfSatellitesGood
STD_RETURN_TYPE_e MXM_5XGetNumberOfSatellitesGood(MXM_5X_INSTANCE_s *pInstance)
Get the value of MXM_5X_INSTANCE::numberOfSatellitesIsGood.
Definition: mxm_battery_management.c:376
BATTERY_MANAGEMENT_WRITEDEVICE
#define BATTERY_MANAGEMENT_WRITEDEVICE
WRITEDEVICE message (write single register of a single device)
Definition: mxm_battery_management.h:104
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_DIS_PREAMBLES
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_DIS_PREAMBLES
Definition: mxm_battery_management.h:185
STD_NOT_OK
@ STD_NOT_OK
Definition: fstd_types.h:73
MXM_5XConstructCommandBufferWriteall
static STD_RETURN_TYPE_e MXM_5XConstructCommandBufferWriteall(MXM_5X_INSTANCE_s *pInstance, uint8_t regAddress, uint8_t dataLSB, uint8_t dataMSB)
clears the command buffer and writes WRITEALL into the buffer
Definition: mxm_battery_management.c:261
MXM_5X_INSTANCE::state
MXM_STATEMACHINE_5X_e state
Definition: mxm_battery_management.h:252
MXM_41B_INSTANCE
Struct for the state-variable of state-machine.
Definition: mxm_17841b.h:149
MXM_41B_STATE_PROCESSED
@ MXM_41B_STATE_PROCESSED
Definition: mxm_17841b.h:126
BATTERY_MANAGEMENT_TX_LENGTH_READALL
#define BATTERY_MANAGEMENT_TX_LENGTH_READALL
Battery Management Protocol lengths of TX buffer.
Definition: mxm_battery_management.h:146
MXM_5X_INSTANCE::numberOfSatellitesIsGood
STD_RETURN_TYPE_e numberOfSatellitesIsGood
Command Buffer.
Definition: mxm_battery_management.h:289
MXM_5X_COMMAND_PAYLOAD_s::lsb
uint8_t lsb
Definition: mxm_battery_management.h:242
MXM_41BReadRegisterFunction
STD_RETURN_TYPE_e MXM_41BReadRegisterFunction(MXM_41B_INSTANCE_s *pInstance, MXM_41B_REG_FUNCTION_e registerFunction, MXM_41B_REG_BIT_VALUE *pValue)
Read the value of a register function.
Definition: mxm_17841b.c:391
MXM_5X_READALL_UART_TRANSACTION
@ MXM_5X_READALL_UART_TRANSACTION
Definition: mxm_battery_management.h:214
MXM_5X_WRITEALL_UART_TRANSACTION
@ MXM_5X_WRITEALL_UART_TRANSACTION
Definition: mxm_battery_management.h:204
MXM_5XGetNumberOfSatellites
uint8_t MXM_5XGetNumberOfSatellites(MXM_5X_INSTANCE_s *pInstance)
Get number of satellites.
Definition: mxm_battery_management.c:372
MXM_5X_INSTANCE::status41b
MXM_41B_STATE_REQUEST_STATUS_e status41b
Definition: mxm_battery_management.h:256
MXM_52IsUserAccessibleRegister
static STD_RETURN_TYPE_e MXM_52IsUserAccessibleRegister(uint8_t regAddress)
Check if a register address is user accessible in MAX17852.
Definition: mxm_battery_management.c:219
MXM_41B_REG_FUNCTION_TX_PREAMBLES
@ MXM_41B_REG_FUNCTION_TX_PREAMBLES
Definition: mxm_17841b.h:137
HELLOALL_START_SEED
#define HELLOALL_START_SEED
Definition: mxm_battery_management.h:77
MXM_STATEMACH_5X_READALL
@ MXM_STATEMACH_5X_READALL
Definition: mxm_battery_management.h:158
MXM_41B_STATE_UNPROCESSED
@ MXM_41B_STATE_UNPROCESSED
Definition: mxm_17841b.h:125
MXM_5X_COMMAND_PAYLOAD_s::deviceAddress
uint8_t deviceAddress
Definition: mxm_battery_management.h:245
MXM_5XGetRXBuffer
STD_RETURN_TYPE_e MXM_5XGetRXBuffer(MXM_5X_INSTANCE_s *pInstance, uint8_t *rxBuffer, uint16_t rxBufferLength)
Copy RX buffer into variable.
Definition: mxm_battery_management.c:350
MXM_41B_REG_BIT_VALUE
uint8_t MXM_41B_REG_BIT_VALUE
Bit-values for registers.
Definition: mxm_bitextract.h:69
NULL_PTR
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:66
MXM_STATEMACH_5X_IDLE
@ MXM_STATEMACH_5X_IDLE
Definition: mxm_battery_management.h:155
MXM_41B_STATE_ERROR
@ MXM_41B_STATE_ERROR
Definition: mxm_17841b.h:127
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_RECEIVE_BUFFER
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_RECEIVE_BUFFER
Definition: mxm_battery_management.h:177
MXM_5XGetLastDCByte
MXM_DC_BYTE_e MXM_5XGetLastDCByte(MXM_5X_INSTANCE_s *pInstance)
Returns the last received DC byte.
Definition: mxm_battery_management.c:368
MXM_53IsUserAccessibleRegister
static STD_RETURN_TYPE_e MXM_53IsUserAccessibleRegister(uint8_t regAddress)
Check if a register address is user accessible in MAX17853.
Definition: mxm_battery_management.c:235
MXM_5XConstructCommandBufferReadall
static STD_RETURN_TYPE_e MXM_5XConstructCommandBufferReadall(MXM_5X_INSTANCE_s *pInstance, uint8_t regAddress)
clears the command buffer and writes READALL into the buffer
Definition: mxm_battery_management.c:320
MXM_STATEMACH_41B_CHECK_FMEA
@ MXM_STATEMACH_41B_CHECK_FMEA
Definition: mxm_17841b.h:84
MXM_5XClearCommandBuffer
static void MXM_5XClearCommandBuffer(MXM_5X_INSTANCE_s *pInstance)
Clear the command-buffer.
Definition: mxm_battery_management.c:182
MXM_41B_REG_TRUE
#define MXM_41B_REG_TRUE
Definition: mxm_bitextract.h:73
BATTERY_MANAGEMENT_WRITEALL
#define BATTERY_MANAGEMENT_WRITEALL
WRITEALL message (write single register of all daisy-chain devices)
Definition: mxm_battery_management.h:109
MXM_5XConstructCommandBufferHelloall
static void MXM_5XConstructCommandBufferHelloall(MXM_5X_INSTANCE_s *pInstance)
clears the command buffer and writes HELLOALL into the buffer
Definition: mxm_battery_management.c:252
MXM_5X_STATE_PROCESSED
@ MXM_5X_STATE_PROCESSED
Definition: mxm_battery_management.h:233
MXM_5XIsUserAccessibleRegister
static STD_RETURN_TYPE_e MXM_5XIsUserAccessibleRegister(uint8_t regAddress)
Check if a register address is user accessible.
Definition: mxm_battery_management.c:190
MXM_5X_COMMAND_PAYLOAD_s
Payload command.
Definition: mxm_battery_management.h:240
MXM_5X_INSTANCE::commandPayload
MXM_5X_COMMAND_PAYLOAD_s commandPayload
Definition: mxm_battery_management.h:254
MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_EN_PREAMBLES
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_EN_PREAMBLES
Definition: mxm_battery_management.h:180
MXM_5X_COMMAND_PAYLOAD_s::msb
uint8_t msb
Definition: mxm_battery_management.h:243
FAS_TRAP
#define FAS_TRAP
Define that evaluates to essential boolean false thus tripping an assert.
Definition: fassert.h:108
MXM_5X_INSTANCE::rxBuffer
uint16_t rxBuffer[MXM_5X_RX_BUFFER_LEN]
Definition: mxm_battery_management.h:300
MXM_5XStateMachine
void MXM_5XStateMachine(MXM_41B_INSTANCE_s *pInstance41b, MXM_5X_INSTANCE_s *pInstance5x)
Execute state-machine for Battery Management Protocol.
Definition: mxm_battery_management.c:412
MXM_5X_INSTANCE::commandBuffer
uint16_t commandBuffer[COMMAND_BUFFER_LENGTH]
Definition: mxm_battery_management.h:299
MXM_5X_READALL_GET_DC
@ MXM_5X_READALL_GET_DC
Definition: mxm_battery_management.h:218
MXM_5X_INSTANCE::lastDCByte
uint8_t lastDCByte
Tracks the last received DC byte.
Definition: mxm_battery_management.h:293
MXM_5X_WRITE_DEVICE_UART_TRANSACTION
@ MXM_5X_WRITE_DEVICE_UART_TRANSACTION
Definition: mxm_battery_management.h:209
BS_NR_OF_STRINGS
#define BS_NR_OF_STRINGS
Definition: battery_system_cfg.h:89
MXM_41B_STATE_UNSENT
@ MXM_41B_STATE_UNSENT
Definition: mxm_17841b.h:124
MXM_5X_RX_BUFFER_LEN
#define MXM_5X_RX_BUFFER_LEN
Definition: mxm_battery_management.h:74
MXM_STATEMACHINE_5X_e
MXM_STATEMACHINE_5X_e
States of the Battery Management Protocol state-machine.
Definition: mxm_battery_management.h:151
MXM_41B_REG_FALSE
#define MXM_41B_REG_FALSE
Definition: mxm_bitextract.h:71
mxm_battery_management.h
Headers for the driver for the MAX17841B ASCI and MAX1785x monitoring chip.
MXM_STATEMACH_41B_CLEAR_RECEIVE_BUFFER
@ MXM_STATEMACH_41B_CLEAR_RECEIVE_BUFFER
Definition: mxm_17841b.h:89