foxBMS  1.1.0
The foxBMS Battery Management System API Documentation
mxm_battery_management.c
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41 
42 /**
43  * @file mxm_battery_management.c
44  * @author foxBMS Team
45  * @date 2019-01-14 (date of creation)
46  * @updated 2021-06-16 (date of last update)
47  * @ingroup DRIVERS
48  * @prefix MXM
49  *
50  * @brief Driver for the MAX17841B ASCI and MAX1785x monitoring chip
51  *
52  * @details def
53  *
54  */
55 
56 /*========== Includes =======================================================*/
57 #include "mxm_battery_management.h"
58 
59 /*========== Macros and Definitions =========================================*/
60 
61 /** length of the helloall command @{*/
62 #define HELLOALL_TX_LENGTH (3u)
63 #define HELLOALL_RX_LENGTH HELLOALL_TX_LENGTH
64 /**@}*/
65 
66 /*========== Static Constant and Variable Definitions =======================*/
67 
68 /*========== Extern Constant and Variable Definitions =======================*/
69 
70 /*========== Static Function Prototypes =====================================*/
71 
72 /**
73  * @brief Clear the command-buffer.
74  * @details Clears #MXM_5X_INSTANCE_s::commandBuffer by writing 0x00 to every entry.
75  * @param[in,out] pInstance pointer to the state-struct
76  * @return always return #STD_OK
77  */
78 static void MXM_5XClearCommandBuffer(MXM_5X_INSTANCE_s *pInstance);
79 
80 /**
81  * @brief Check if a register address is user accessible
82  * @details Checks if a register address is inside the user accessible memory
83  * range. This range is specified in the datasheet of the monitoring
84  * IC as following:
85  * - user memory is contained in the range 0x00 to 0x98
86  * - reserved addresses in the user address space are:
87  * - 0x2C, 0x2D, 0x2E, 0x2F
88  * - 0x46
89  * - 0x84 through 0x8B
90  * @param[in] regAddress register address to be checked
91  * @return #STD_OK if the register address is good, otherwise #STD_NOT_OK
92  */
93 static STD_RETURN_TYPE_e MXM_5XIsUserAccessibleRegister(uint8_t regAddress);
94 
95 /**
96  * @brief Check if a register address is user accessible in MAX17852
97  * @details Checks if a register address is inside the user accessible memory
98  * range.
99  * This range is specified in the datasheet of the monitoring IC.
100  * @param[in] regAddress register address to be checked
101  * @return #STD_OK if the register address is good, otherwise #STD_NOT_OK
102  */
103 static STD_RETURN_TYPE_e MXM_52IsUserAccessibleRegister(uint8_t regAddress);
104 
105 /**
106  * @brief Check if a register address is user accessible in MAX17853
107  * @details Checks if a register address is inside the user accessible memory
108  * range.
109  * This range is specified in the datasheet of the monitoring IC as
110  * the following:
111  * - user memory is contained in the range 0x00 to 0x98
112  * - reserved addresses in the user address space are:
113  * - 0x2C, 0x2D, 0x2E, 0x2F
114  * - 0x46
115  * - 0x84 through 0x8B
116  * @param[in] regAddress register address to be checked
117  * @return #STD_OK if the register address is good, otherwise #STD_NOT_OK
118  */
119 static STD_RETURN_TYPE_e MXM_53IsUserAccessibleRegister(uint8_t regAddress);
120 
121 /**
122  * @brief clears the command buffer and writes HELLOALL into the buffer
123  * @details Fills the command buffer with a HELLOALL message after having it
124  * cleaned.
125  * @param[in,out] pInstance pointer to the state-struct
126  */
128 
129 /**
130  * @brief clears the command buffer and writes WRITEALL into the buffer
131  * @details Fills the command buffer with a WRITEALL command. This command
132  * writes the same lsb and msb to every satellite in the daisy-chain
133  * in the same register.
134  * @param[in,out] pInstance pointer to the state-struct
135  * @param[in] regAddress address of the register that should be written
136  * @param[in] dataLSB LSB of the register that should be written
137  * @param[in] dataMSB MSB of the register that should be written
138  * @return #STD_OK if an accessible register address has been selected,
139  * #STD_NOT_OK if not.
140  */
142  MXM_5X_INSTANCE_s *pInstance,
143  uint8_t regAddress,
144  uint8_t dataLSB,
145  uint8_t dataMSB);
146 
147 /**
148  * @brief clears the command buffer and writes a WRITEDEVICE message
149  * @details Fills the command buffer with a WRITEDEVICE message. This message
150  * is addressed to one specific device in the daisy-chain. Therefore
151  * the address of the device has to be supplied together with the
152  * register and the data that should be written.
153  * @param[in,out] pInstance pointer to the state-struct
154  * @param[in] deviceAddress address for the satellite that should be
155  * written to
156  * @param[in] regAddress address of the register that should be written
157  * @param[in] dataLSB LSB of the register that should be written
158  * @param[in] dataMSB MSB of the register that should be written
159  * @return #STD_OK if an accessible register address has been selected,
160  * #STD_NOT_OK if not.
161  */
163  MXM_5X_INSTANCE_s *pInstance,
164  uint8_t deviceAddress,
165  uint8_t regAddress,
166  uint8_t dataLSB,
167  uint8_t dataMSB);
168 
169 /**
170  * @brief clears the command buffer and writes READALL into the buffer
171  * @details Fills the command buffer with a READALL command. This command
172  * retrieves the LSB and MSB of exactly one register of every device
173  * in the daisy-chain.
174  * @param[in,out] pInstance pointer to the state-struct
175  * @param[in] regAddress address of the register that should be read
176  * @return #STD_OK if an accessible register address has been selected,
177  * #STD_NOT_OK if not.
178  */
179 static STD_RETURN_TYPE_e MXM_5XConstructCommandBufferReadall(MXM_5X_INSTANCE_s *pInstance, uint8_t regAddress);
180 
181 /*========== Static Function Implementations ================================*/
183  for (uint8_t i = 0; i < COMMAND_BUFFER_LENGTH; i++) {
184  pInstance->commandBuffer[i] = 0x00U;
185  }
187 }
188 
190  STD_RETURN_TYPE_e retval = STD_OK;
191  /* check if regAddress is in user-accessible area */
192  if (regAddress <= 0x98U) {
193  /* overall range is good, check for exceptions */
194 
195  /* TODO make selectable which chip is used */
196 
197  /* MAX17852 */
198  if ((regAddress == 0x5DU) || (regAddress == 0x5EU)) {
199  retval = STD_NOT_OK;
200  }
201 
202  } else {
203  /* regAddress is outside user-accessible range */
204  retval = STD_NOT_OK;
205  }
206  return retval;
207 }
208 
210  STD_RETURN_TYPE_e retval = STD_OK;
211  /* check if regAddress is in user-accessible area */
212  if (regAddress <= 0x98U) {
213  /* overall range is good, check for exceptions */
214  /* MAX17852 */
215  if ((regAddress == 0x5DU) || (regAddress == 0x5EU)) {
216  retval = STD_NOT_OK;
217  }
218  } else {
219  /* regAddress is outside user-accessible range */
220  retval = STD_NOT_OK;
221  }
222  return retval;
223 }
224 
226  STD_RETURN_TYPE_e retval = STD_OK;
227  /* check if regAddress is in user-accessible area */
228  if (regAddress <= 0x98U) {
229  /* overall range is good, check for exceptions */
230  if ((regAddress == 0x46U) || ((0x2CU <= regAddress) && (regAddress <= 0x2FU)) ||
231  ((0x84U <= regAddress) && (regAddress <= 0x8BU))) {
232  /* regAddress is inside one of the exceptions */
233  retval = STD_NOT_OK;
234  }
235  } else {
236  /* regAddress is outside user-accessible range */
237  retval = STD_NOT_OK;
238  }
239  return retval;
240 }
241 
243  MXM_5XClearCommandBuffer(pInstance);
245  pInstance->commandBuffer[1] = 0x00;
246  pInstance->commandBuffer[2] = HELLOALL_START_SEED;
247  pInstance->commandBufferCurrentLength = 3;
248 }
249 
251  MXM_5X_INSTANCE_s *pInstance,
252  uint8_t regAddress,
253  uint8_t dataLSB,
254  uint8_t dataMSB) {
255  STD_RETURN_TYPE_e retval = STD_NOT_OK;
256 
257  if (MXM_5XIsUserAccessibleRegister(regAddress) == STD_OK) {
258  /* clear command buffer */
259  MXM_5XClearCommandBuffer(pInstance);
260 
261  /* construct command buffer */
263  pInstance->commandBuffer[1] = regAddress;
264  pInstance->commandBuffer[2] = dataLSB;
265  pInstance->commandBuffer[3] = dataMSB;
266  /* PEC byte */
267  pInstance->commandBuffer[4] = MXM_CRC8(pInstance->commandBuffer, 4);
268  /* TODO alive-counter? */
269  pInstance->commandBufferCurrentLength = 5;
270  retval = STD_OK;
271  }
272 
273  return retval;
274 }
275 
277  MXM_5X_INSTANCE_s *pInstance,
278  uint8_t deviceAddress,
279  uint8_t regAddress,
280  uint8_t dataLSB,
281  uint8_t dataMSB) {
282  STD_RETURN_TYPE_e retval = STD_NOT_OK;
283 
284  if (MXM_5XIsUserAccessibleRegister(regAddress) == STD_OK) {
285  /* clear command buffer */
286  MXM_5XClearCommandBuffer(pInstance);
287 
288  /* construct command buffer */
289 
290  /* commandBuffer[0] = Device address in a daisy chain + 0b100
291  * DA = deviceAddress
292  * Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
293  * Content | DA[4] | DA[3] | DA[2] | DA[1] | DA[0] | 1 | 0 | 0
294  */
295  pInstance->commandBuffer[0] = ((deviceAddress << 3) & 0xF8u) | BATTERY_MANAGEMENT_WRITEDEVICE;
296  pInstance->commandBuffer[1] = regAddress;
297  pInstance->commandBuffer[2] = dataLSB;
298  pInstance->commandBuffer[3] = dataMSB;
299  /* PEC byte */
300  pInstance->commandBuffer[4] = MXM_CRC8(pInstance->commandBuffer, 4);
301  /* TODO alive-counter? */
302  pInstance->commandBufferCurrentLength = 5;
303  retval = STD_OK;
304  }
305 
306  return retval;
307 }
308 
310  STD_RETURN_TYPE_e retval = STD_NOT_OK;
311  /* TODO test these functions */
312 
313  if (MXM_5XIsUserAccessibleRegister(regAddress) == STD_OK) {
314  /* clear command buffer */
315  MXM_5XClearCommandBuffer(pInstance);
316 
317  /* construct command buffer */
319  pInstance->commandBuffer[1] = regAddress;
320  pInstance->commandBuffer[2] = DATA_CHECK_BYTE_SEED;
321  /* PEC byte */
322  pInstance->commandBuffer[3] = MXM_CRC8(pInstance->commandBuffer, 3);
323  /* TODO alive-counter? */
324  pInstance->commandBufferCurrentLength = 4;
325  retval = STD_OK;
326  }
327 
329  /* define containing command buffer length does
330  * not match actual buffer */
331  retval = STD_NOT_OK;
332  }
333 
334  return retval;
335 }
336 
337 /*========== Extern Function Implementations ================================*/
338 
340  const MXM_5X_INSTANCE_s *const kpkInstance,
341  uint8_t *rxBuffer,
342  uint16_t rxBufferLength) {
343  STD_RETURN_TYPE_e retval = STD_OK;
344 
345  if ((rxBuffer != NULL_PTR) && (rxBufferLength != 0u)) {
346  for (uint16_t i = 0; i < rxBufferLength; i++) {
347  if (i < MXM_5X_RX_BUFFER_LEN) {
348  rxBuffer[i] = (uint8_t)kpkInstance->rxBuffer[i];
349  } else {
350  rxBuffer[i] = 0;
351  }
352  }
353  } else {
354  retval = STD_NOT_OK;
355  }
356 
357  return retval;
358 }
359 
360 extern MXM_DC_BYTE_e MXM_5XGetLastDCByte(const MXM_5X_INSTANCE_s *const kpkInstance) {
361  return (MXM_DC_BYTE_e)kpkInstance->lastDCByte;
362 }
363 
364 extern uint8_t MXM_5XGetNumberOfSatellites(const MXM_5X_INSTANCE_s *const kpkInstance) {
365  return kpkInstance->numberOfSatellites;
366 }
367 
369  return kpkInstance->numberOfSatellitesIsGood;
370 }
371 
373  MXM_5X_INSTANCE_s *pInstance5x,
374  MXM_STATEMACHINE_5X_e state,
375  MXM_5X_COMMAND_PAYLOAD_s commandPayload,
376  MXM_5X_STATE_REQUEST_STATUS_e *processed) {
377  STD_RETURN_TYPE_e retval = STD_OK;
378  if (state >= MXM_STATEMACH_5X_MAXSTATE) {
379  retval = STD_NOT_OK;
380  } else if (processed == NULL_PTR) {
381  retval = STD_NOT_OK;
382  } else if (pInstance5x->state == MXM_STATEMACH_5X_UNINITIALIZED) {
383  if (state == MXM_STATEMACH_5X_INIT) {
384  pInstance5x->state = state;
385  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
386  pInstance5x->commandPayload = commandPayload;
387  pInstance5x->processed = processed;
388  *pInstance5x->processed = MXM_5X_STATE_UNPROCESSED;
389  } else {
390  retval = STD_NOT_OK;
391  }
392  } else if (pInstance5x->state == MXM_STATEMACH_5X_IDLE) {
393  pInstance5x->state = state;
394  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
395  pInstance5x->commandPayload = commandPayload;
396  pInstance5x->processed = processed;
397  *pInstance5x->processed = MXM_5X_STATE_UNPROCESSED;
398  } else {
399  retval = STD_NOT_OK;
400  }
401  return retval;
402 }
403 
404 void MXM_5XStateMachine(MXM_41B_INSTANCE_s *pInstance41b, MXM_5X_INSTANCE_s *pInstance5x) {
405  STD_RETURN_TYPE_e retval;
406  switch (pInstance5x->state) {
408  /* statemachine waits here for initialization */
409  break;
411  /* TODO idle state */
412  break;
414  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
415  /* entry of state --> set to first substate */
416  pInstance5x->substate = MXM_5X_41B_FMEA_REQUEST;
417  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
418  }
419 
420  if (pInstance5x->substate == MXM_5X_41B_FMEA_REQUEST) {
421  retval = MXM_41BSetStateRequest(
422  pInstance41b, MXM_STATEMACH_41B_CHECK_FMEA, NULL_PTR, 0, 0, NULL_PTR, 0, &pInstance5x->status41b);
423  if (retval == STD_OK) {
424  pInstance5x->substate = MXM_5X_41B_FMEA_CHECK;
425  } else {
426  /* stay here */
427  }
428  } else if (pInstance5x->substate == MXM_5X_41B_FMEA_CHECK) {
429  if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
430  /* wait for processing
431  * TODO implement timeout? */
432  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
433  *pInstance5x->processed = MXM_5X_STATE_ERROR;
434  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
435  /* TODO continue */
436  *pInstance5x->processed = MXM_5X_STATE_PROCESSED;
437  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
438  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
439  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
440  } else {
442  }
443  } else {
444  /* something is very broken */
445  *pInstance5x->processed = MXM_5X_STATE_ERROR;
446  }
447  break;
449  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
450  /* entry of state --> set to first substate */
451  pInstance5x->substate = MXM_5X_INIT_41B_INIT;
452  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
453  }
454 
455  if (pInstance5x->substate == MXM_5X_INIT_41B_INIT) {
456  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
457  retval = MXM_41BSetStateRequest(
458  pInstance41b, MXM_STATEMACH_41B_INIT, NULL_PTR, 0, 0, NULL_PTR, 0, &pInstance5x->status41b);
459  if (retval == STD_NOT_OK) {
460  /* TODO error handling */
461  }
462  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
463  /* wait for processing
464  * TODO implement timeout? */
465  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
466  /* TODO error handling */
467  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
468  /* TODO continue */
470  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
471  } else {
473  }
474  } else if (pInstance5x->substate == MXM_5X_INIT_ENABLE_KEEP_ALIVE) {
475  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
478  if (retval == STD_OK) {
479  retval = MXM_41BSetStateRequest(
480  pInstance41b,
482  NULL_PTR,
483  0,
484  0,
485  NULL_PTR,
486  0,
487  &pInstance5x->status41b);
488  }
489  if (retval == STD_NOT_OK) {
490  /* TODO error handling */
491  }
492  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
493  /* wait for processing
494  * TODO implement timeout? */
495  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
496  /* TODO error handling */
497  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
498  /* TODO continue */
500  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
501  } else {
503  }
504  } else if (pInstance5x->substate == MXM_5X_INIT_ENABLE_RX_INTERRUPT_FLAGS) {
505  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
506  retval =
508  if (retval == STD_NOT_OK) {
509  /* TODO error handling */
510  }
513  if (retval == STD_OK) {
514  retval = MXM_41BSetStateRequest(
515  pInstance41b,
517  NULL_PTR,
518  0,
519  0,
520  NULL_PTR,
521  0,
522  &pInstance5x->status41b);
523  }
524  if (retval == STD_NOT_OK) {
525  /* TODO error handling */
526  }
527  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
528  /* wait for processing
529  * TODO implement timeout? */
530  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
531  /* TODO error handling */
532  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
533  /* TODO continue */
535  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
536  } else {
538  }
540  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
541  retval = MXM_41BSetStateRequest(
542  pInstance41b,
544  NULL_PTR,
545  0,
546  0,
547  NULL_PTR,
548  0,
549  &pInstance5x->status41b);
550  if (retval == STD_NOT_OK) {
551  /* TODO error handling */
552  }
553  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
554  /* wait for processing
555  * TODO implement timeout? */
556  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
557  /* TODO error handling */
558  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
559  /* TODO continue */
560  /* TODO next step */
562  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
563  } else {
565  }
567  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
568  retval =
570  if (retval == STD_OK) {
571  retval = MXM_41BSetStateRequest(
572  pInstance41b,
574  NULL_PTR,
575  0,
576  0,
577  NULL_PTR,
578  0,
579  &pInstance5x->status41b);
580  }
581  if (retval == STD_NOT_OK) {
582  /* TODO error handling */
583  }
584  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
585  /* wait for processing
586  * TODO implement timeout? */
587  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
588  /* TODO error handling */
589  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
591  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
592  } else {
594  }
596  /* TODO wait for rx status change busy */
597  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
598  retval = MXM_41BSetStateRequest(
599  pInstance41b,
601  NULL_PTR,
602  0,
603  0,
604  NULL_PTR,
605  0,
606  &pInstance5x->status41b);
607  if (retval == STD_NOT_OK) {
608  /* TODO error handling */
609  }
610  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
611  /* wait for processing
612  * TODO implement timeout? */
613  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
614  /* TODO error handling */
615  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
616  MXM_41B_REG_BIT_VALUE functionValue;
617  retval =
619  if (retval == STD_NOT_OK) {
620  /* TODO this should not happen, did we use the right enum? */
621  } else {
622  if (functionValue == MXM_41B_REG_FALSE) {
623  /* repeat this state */
624  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
625  } else if (functionValue == MXM_41B_REG_TRUE) {
627  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
628  } else {
630  }
631  }
632  } else {
634  }
636  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
639  if (retval == STD_OK) {
640  retval = MXM_41BSetStateRequest(
641  pInstance41b,
643  NULL_PTR,
644  0,
645  0,
646  NULL_PTR,
647  0,
648  &pInstance5x->status41b);
649  }
650  if (retval == STD_NOT_OK) {
651  /* TODO error handling */
652  }
653  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
654  /* wait for processing
655  * TODO implement timeout? */
656  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
657  /* TODO error handling */
658  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
660  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
661  } else {
663  }
665  /* TODO wait for rx status change busy */
666  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
667  retval = MXM_41BSetStateRequest(
668  pInstance41b,
670  NULL_PTR,
671  0,
672  0,
673  NULL_PTR,
674  0,
675  &pInstance5x->status41b);
676  if (retval == STD_NOT_OK) {
677  /* TODO error handling */
678  }
679  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
680  /* wait for processing
681  * TODO implement timeout? */
682  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
683  /* TODO error handling */
684  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
685  MXM_41B_REG_BIT_VALUE functionValue;
686  retval =
688  if (retval == STD_NOT_OK) {
689  /* TODO this should not happen, did we use the right enum? */
690  } else {
691  if (functionValue == MXM_41B_REG_TRUE) {
692  /* repeat this state until rx_empty_status is 0 */
693  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
694  } else if (functionValue == MXM_41B_REG_FALSE) {
696  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
697  } else {
699  }
700  }
701  } else {
703  }
705  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
706  retval = MXM_41BSetStateRequest(
707  pInstance41b,
709  NULL_PTR,
710  0,
711  0,
712  NULL_PTR,
713  0,
714  &pInstance5x->status41b);
715  if (retval == STD_NOT_OK) {
716  /* TODO error handling */
717  }
718  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
719  /* wait for processing
720  * TODO implement timeout? */
721  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
722  /* TODO error handling */
723  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
725  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
726  } else {
728  }
730  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
731  retval = MXM_41BSetStateRequest(
732  pInstance41b,
734  NULL_PTR,
735  0,
736  0,
737  NULL_PTR,
738  0,
739  &pInstance5x->status41b);
740  if (retval == STD_NOT_OK) {
741  /* TODO error handling */
742  }
743  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
744  /* wait for processing
745  * TODO implement timeout? */
746  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
747  /* TODO error handling */
748  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
750  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
751  } else {
753  }
754  } else if (pInstance5x->substate == MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_HELLOALL) {
755  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
757  retval = MXM_41BSetStateRequest(
758  pInstance41b,
760  pInstance5x->commandBuffer,
761  pInstance5x->commandBufferCurrentLength,
762  0,
763  pInstance5x->rxBuffer,
765  &pInstance5x->status41b);
766  if (retval == STD_NOT_OK) {
767  /* TODO error handling */
768  }
769  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
770  /* wait for processing
771  * TODO implement timeout? */
772  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
773  /* reset state-machine */
774  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
775  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
777  } else {
779  }
780  /* TODO check for receive buffer errors and handle */
782  /* check if the commandBuffer matches with the receive buffer */
783  retval = STD_OK;
784  for (uint8_t i = 0u; i < (pInstance5x->commandBufferCurrentLength - 1u); i++) {
785  if (pInstance5x->commandBuffer[i] != pInstance5x->rxBuffer[i]) {
786  retval = STD_NOT_OK;
787  }
788  }
789  /* update number of satellites
790  */
791  pInstance5x->numberOfSatellites =
792  (uint8_t)(pInstance5x->rxBuffer[HELLOALL_RX_LENGTH - 1u] - HELLOALL_START_SEED);
793 
794  /*
795  * Plausibility check, compare with preset number of satellites
796  */
797  if (pInstance5x->numberOfSatellites == (BS_NR_OF_MODULES * BS_NR_OF_STRINGS)) {
798  pInstance5x->numberOfSatellitesIsGood = STD_OK;
799  }
800 
801  if (retval == STD_NOT_OK) {
802  /* TODO error handling */
803  } else {
804  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
805  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
806  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
807  *pInstance5x->processed = MXM_5X_STATE_PROCESSED;
808  }
809  } else {
810  /* something is very broken */
811  *pInstance5x->processed = MXM_5X_STATE_ERROR;
812  }
813  break;
815  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
816  /* entry of state --> set to first substate */
818  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
819  }
820 
821  if (pInstance5x->substate == MXM_5X_WRITEALL_UART_TRANSACTION) {
822  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
824  pInstance5x,
825  pInstance5x->commandPayload.regAddress,
826  pInstance5x->commandPayload.lsb,
827  pInstance5x->commandPayload.msb);
828  retval = MXM_41BSetStateRequest(
829  pInstance41b,
831  pInstance5x->commandBuffer,
832  pInstance5x->commandBufferCurrentLength,
833  0,
834  pInstance5x->rxBuffer,
835  pInstance5x->commandBufferCurrentLength,
836  &pInstance5x->status41b);
837  /* TODO check CRC */
838  if (retval == STD_NOT_OK) {
839  /* TODO error handling */
840  }
841  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
842  /* wait for processing
843  * TODO implement timeout? */
844  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
845  /* reset state-machine */
846  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
847  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
848  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
849  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
850  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
851  *pInstance5x->processed = MXM_5X_STATE_PROCESSED; /* TODO continue */
852  } else {
854  }
855  }
856  break;
858  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
859  /* entry of state --> set to first substate */
861  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
862  }
863 
864  if (pInstance5x->substate == MXM_5X_WRITE_DEVICE_UART_TRANSACTION) {
865  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
867  pInstance5x,
868  pInstance5x->commandPayload.deviceAddress,
869  pInstance5x->commandPayload.regAddress,
870  pInstance5x->commandPayload.lsb,
871  pInstance5x->commandPayload.msb);
872  retval = MXM_41BSetStateRequest(
873  pInstance41b,
875  pInstance5x->commandBuffer,
876  pInstance5x->commandBufferCurrentLength,
877  0,
878  pInstance5x->rxBuffer,
879  pInstance5x->commandBufferCurrentLength,
880  &pInstance5x->status41b);
881  if (retval == STD_NOT_OK) {
882  *pInstance5x->processed = MXM_5X_STATE_ERROR;
883  }
884  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
885  /* wait for processing */
886  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
887  /* reset state-machine */
888  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
889  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
890  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
891  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
892  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
893  *pInstance5x->processed = MXM_5X_STATE_PROCESSED; /* TODO continue and check CRC */
894  } else {
895  /* This should never happen */
896  *pInstance5x->processed = MXM_5X_STATE_ERROR;
897  }
898  }
899  break;
901  if (pInstance5x->substate == MXM_5X_ENTRY_SUBSTATE) {
902  /* entry of state --> set to first substate */
904  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
905  }
906 
907  if (pInstance5x->substate == MXM_5X_READALL_UART_TRANSACTION) {
908  if (pInstance5x->status41b == MXM_41B_STATE_UNSENT) {
910  /* TODO parse rx buffer here into values and parse CRC before passing on*/
911  /* stretch message length in order to accommodate 2 bytes per satellite */
912  retval = MXM_41BSetStateRequest(
913  pInstance41b,
915  pInstance5x->commandBuffer,
916  pInstance5x->commandBufferCurrentLength,
917  2u * pInstance5x->numberOfSatellites,
918  pInstance5x->rxBuffer,
920  &pInstance5x->status41b);
921 
922  if (retval == STD_NOT_OK) {
923  /* TODO error handling */
924  }
925  } else if (pInstance5x->status41b == MXM_41B_STATE_UNPROCESSED) {
926  /* wait for processing
927  * TODO implement timeout? */
928  } else if (pInstance5x->status41b == MXM_41B_STATE_ERROR) {
929  /* reset state-machine */
930  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
931  } else if (pInstance5x->status41b == MXM_41B_STATE_PROCESSED) {
932  pInstance5x->substate = MXM_5X_READALL_CHECK_CRC;
933  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
934  } else {
936  }
937  } else if (pInstance5x->substate == MXM_5X_READALL_CHECK_CRC) {
938  /* check CRC */
939  if (MXM_CRC8(
940  pInstance5x->rxBuffer,
941  pInstance5x->commandBufferCurrentLength + (2u * pInstance5x->numberOfSatellites)) == 0x00u) {
942  pInstance5x->substate = MXM_5X_READALL_GET_DC;
943  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
944  } else {
945  *pInstance5x->processed = MXM_5X_STATE_ERROR;
946  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
947  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
948  }
949  } else if (pInstance5x->substate == MXM_5X_READALL_GET_DC) {
950  /* get DC */ /* TODO check DC in this state */
951  /* dc byte position is after data */
952  uint8_t dc_byte_position = 2u + (2u * pInstance5x->numberOfSatellites);
953 
954  pInstance5x->lastDCByte = (uint8_t)pInstance5x->rxBuffer[dc_byte_position];
955 
956  pInstance5x->substate = MXM_5X_ENTRY_SUBSTATE;
957  pInstance5x->status41b = MXM_41B_STATE_UNSENT;
958  pInstance5x->state = MXM_STATEMACH_5X_IDLE;
959  *pInstance5x->processed = MXM_5X_STATE_PROCESSED; /* TODO continue */
960  } else {
961  /* something is very broken */
962  *pInstance5x->processed = MXM_5X_STATE_ERROR;
963  }
964  break;
965  default:
967  break;
968  }
969 }
970 
972  STD_RETURN_TYPE_e retval = STD_NOT_OK;
973  STD_RETURN_TYPE_e retval_check0 = STD_NOT_OK;
974  STD_RETURN_TYPE_e retval_check1 = STD_NOT_OK;
975  STD_RETURN_TYPE_e retval_check2 = STD_NOT_OK;
976  STD_RETURN_TYPE_e retval_check3 = STD_NOT_OK;
977  STD_RETURN_TYPE_e retval_check4 = STD_NOT_OK;
978  STD_RETURN_TYPE_e retval_check5 = STD_NOT_OK;
979  STD_RETURN_TYPE_e retval_check6 = STD_NOT_OK;
980  STD_RETURN_TYPE_e retval_check7 = STD_NOT_OK;
981  STD_RETURN_TYPE_e retval_check8 = STD_NOT_OK;
982  STD_RETURN_TYPE_e retval_check9 = STD_OK;
983  STD_RETURN_TYPE_e retval_check10 = STD_OK;
984  STD_RETURN_TYPE_e retval_check11 = STD_OK;
985  STD_RETURN_TYPE_e retval_check12 = STD_OK;
986  STD_RETURN_TYPE_e retval_check13 = STD_OK;
987  STD_RETURN_TYPE_e retval_check14 = STD_OK;
988  STD_RETURN_TYPE_e retval_check15 = STD_OK;
989  STD_RETURN_TYPE_e retval_check16 = STD_OK;
990  STD_RETURN_TYPE_e retval_check17 = STD_OK;
991 
992  /* check:
993  * - user memory is contained in range 0x00 to 0x98
994  * - reserved addresses in user address space:
995  * 0x2C, 0x2D, 0x2E, 0x2F, 0x46 and 0x84 through 0x8B */
996 
997  /* expected #STD_OK */
998  retval_check0 = MXM_5XIsUserAccessibleRegister(0x00U);
999  retval_check1 = MXM_5XIsUserAccessibleRegister(0x42U);
1000  retval_check2 = MXM_5XIsUserAccessibleRegister(0x98U);
1001 
1002  retval_check3 = MXM_52IsUserAccessibleRegister(0x00U);
1003  retval_check4 = MXM_52IsUserAccessibleRegister(0x42U);
1004  retval_check5 = MXM_52IsUserAccessibleRegister(0x98U);
1005 
1006  retval_check6 = MXM_53IsUserAccessibleRegister(0x00U);
1007  retval_check7 = MXM_53IsUserAccessibleRegister(0x42U);
1008  retval_check8 = MXM_53IsUserAccessibleRegister(0x98U);
1009 
1010  /* expected #STD_NOT_OK */
1011  retval_check9 = MXM_53IsUserAccessibleRegister(0x2CU);
1012  retval_check10 = MXM_53IsUserAccessibleRegister(0x2EU);
1013  retval_check11 = MXM_53IsUserAccessibleRegister(0x2FU);
1014  retval_check12 = MXM_53IsUserAccessibleRegister(0x46U);
1015  retval_check13 = MXM_53IsUserAccessibleRegister(0x84U);
1016  retval_check14 = MXM_53IsUserAccessibleRegister(0x8BU);
1017 
1018  retval_check15 = MXM_5XIsUserAccessibleRegister(0x99U);
1019  retval_check16 = MXM_52IsUserAccessibleRegister(0x99U);
1020  retval_check17 = MXM_53IsUserAccessibleRegister(0x99U);
1021 
1022  if ((retval_check0 == STD_OK) && (retval_check1 == STD_OK) && (retval_check2 == STD_OK) &&
1023  (retval_check3 == STD_OK) && (retval_check4 == STD_OK) && (retval_check5 == STD_OK) &&
1024  (retval_check6 == STD_OK) && (retval_check7 == STD_OK) && (retval_check8 == STD_OK) &&
1025  (retval_check9 == STD_NOT_OK) && (retval_check10 == STD_NOT_OK) && (retval_check11 == STD_NOT_OK) &&
1026  (retval_check12 == STD_NOT_OK) && (retval_check13 == STD_NOT_OK) && (retval_check14 == STD_NOT_OK) &&
1027  (retval_check15 == STD_NOT_OK) && (retval_check16 == STD_NOT_OK) && (retval_check17 == STD_NOT_OK)) {
1028  retval = STD_OK;
1029  }
1030  return retval;
1031 }
1032 
1033 /*========== Externalized Static Function Implementations (Unit Test) =======*/
#define BS_NR_OF_STRINGS
#define BS_NR_OF_MODULES
number of modules in battery pack
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
Definition: fassert.h:237
#define FAS_TRAP
Define that evaluates to essential boolean false thus tripping an assert.
Definition: fassert.h:108
@ STD_NOT_OK
Definition: fstd_types.h:73
@ STD_OK
Definition: fstd_types.h:72
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:66
enum STD_RETURN_TYPE STD_RETURN_TYPE_e
#define must_check_return
Allows functions to generate warnings in GCC for unused returns.
Definition: general.h:95
STD_RETURN_TYPE_e MXM_41BWriteRegisterFunction(MXM_41B_INSTANCE_s *pInstance, MXM_41B_REG_FUNCTION_e registerFunction, MXM_41B_REG_BIT_VALUE value)
Write a register function.
Definition: mxm_17841b.c:347
const uint8_t mxm_kConfig3KeepAlive160us41BRegister
standard configuration for register config 3
Definition: mxm_17841b.c:84
STD_RETURN_TYPE_e MXM_41BSetStateRequest(MXM_41B_INSTANCE_s *pInstance, MXM_STATEMACH_41B_e state, uint16_t *pPayload, uint16_t payloadLength, uint8_t extendMessageBytes, uint16_t *pRxBuffer, uint16_t rxBufferLength, MXM_41B_STATE_REQUEST_STATUS_e *processed)
Set state transition for MAX17841B-state-machine.
Definition: mxm_17841b.c:291
STD_RETURN_TYPE_e MXM_41BReadRegisterFunction(const MXM_41B_INSTANCE_s *const kpkInstance, MXM_41B_REG_FUNCTION_e registerFunction, MXM_41B_REG_BIT_VALUE *pValue)
Read the value of a register function.
Definition: mxm_17841b.c:391
@ MXM_41B_STATE_UNSENT
Definition: mxm_17841b.h:124
@ MXM_41B_STATE_ERROR
Definition: mxm_17841b.h:127
@ MXM_41B_STATE_UNPROCESSED
Definition: mxm_17841b.h:125
@ MXM_41B_STATE_PROCESSED
Definition: mxm_17841b.h:126
@ MXM_41B_REG_FUNCTION_RX_BUSY_STATUS
Definition: mxm_17841b.h:134
@ MXM_41B_REG_FUNCTION_RX_EMPTY_STATUS
Definition: mxm_17841b.h:136
@ MXM_41B_REG_FUNCTION_TX_PREAMBLES
Definition: mxm_17841b.h:137
@ MXM_41B_REG_FUNCTION_RX_ERROR_INT
Definition: mxm_17841b.h:139
@ MXM_41B_REG_FUNCTION_KEEP_ALIVE
Definition: mxm_17841b.h:138
@ MXM_41B_REG_FUNCTION_RX_OVERFLOW_INT
Definition: mxm_17841b.h:140
@ MXM_STATEMACH_41B_CLEAR_RECEIVE_BUFFER
Definition: mxm_17841b.h:89
@ MXM_STATEMACH_41B_CLEAR_TRANSMIT_BUFFER
Definition: mxm_17841b.h:90
@ MXM_STATEMACH_41B_INIT
Definition: mxm_17841b.h:82
@ MXM_STATEMACH_41B_WRITE_CONF_AND_INT_REGISTER
Definition: mxm_17841b.h:86
@ MXM_STATEMACH_41B_CHECK_FMEA
Definition: mxm_17841b.h:84
@ MXM_STATEMACH_41B_READ_STATUS_REGISTER
Definition: mxm_17841b.h:87
@ MXM_STATEMACH_41B_UART_TRANSACTION
Definition: mxm_17841b.h:88
enum MXM_DC_BYTE MXM_DC_BYTE_e
STD_RETURN_TYPE_e must_check_return MXM_5XUserAccessibleAddressSpaceCheckerSelfCheck(void)
runs a selfcheck for the address space check
void MXM_5XStateMachine(MXM_41B_INSTANCE_s *pInstance41b, MXM_5X_INSTANCE_s *pInstance5x)
Execute state-machine for Battery Management Protocol.
static void MXM_5XClearCommandBuffer(MXM_5X_INSTANCE_s *pInstance)
Clear the command-buffer.
static STD_RETURN_TYPE_e MXM_5XIsUserAccessibleRegister(uint8_t regAddress)
Check if a register address is user accessible.
STD_RETURN_TYPE_e MXM_5XGetRXBuffer(const MXM_5X_INSTANCE_s *const kpkInstance, uint8_t *rxBuffer, uint16_t rxBufferLength)
Copy RX buffer into variable.
STD_RETURN_TYPE_e MXM_5XSetStateRequest(MXM_5X_INSTANCE_s *pInstance5x, MXM_STATEMACHINE_5X_e state, MXM_5X_COMMAND_PAYLOAD_s commandPayload, MXM_5X_STATE_REQUEST_STATUS_e *processed)
Set state request for the Battery Management Statemachine.
static STD_RETURN_TYPE_e MXM_52IsUserAccessibleRegister(uint8_t regAddress)
Check if a register address is user accessible in MAX17852.
static void MXM_5XConstructCommandBufferHelloall(MXM_5X_INSTANCE_s *pInstance)
clears the command buffer and writes HELLOALL into the buffer
STD_RETURN_TYPE_e MXM_5XGetNumberOfSatellitesGood(const MXM_5X_INSTANCE_s *const kpkInstance)
Get the value of MXM_5X_INSTANCE::numberOfSatellitesIsGood.
#define HELLOALL_RX_LENGTH
static STD_RETURN_TYPE_e MXM_53IsUserAccessibleRegister(uint8_t regAddress)
Check if a register address is user accessible in MAX17853.
static STD_RETURN_TYPE_e MXM_5XConstructCommandBufferReadall(MXM_5X_INSTANCE_s *pInstance, uint8_t regAddress)
clears the command buffer and writes READALL into the buffer
static STD_RETURN_TYPE_e MXM_5XConstructCommandBufferWriteall(MXM_5X_INSTANCE_s *pInstance, uint8_t regAddress, uint8_t dataLSB, uint8_t dataMSB)
clears the command buffer and writes WRITEALL into the buffer
MXM_DC_BYTE_e MXM_5XGetLastDCByte(const MXM_5X_INSTANCE_s *const kpkInstance)
Returns the last received DC byte.
static STD_RETURN_TYPE_e MXM_5XConstructCommandBufferWriteDevice(MXM_5X_INSTANCE_s *pInstance, uint8_t deviceAddress, uint8_t regAddress, uint8_t dataLSB, uint8_t dataMSB)
clears the command buffer and writes a WRITEDEVICE message
uint8_t MXM_5XGetNumberOfSatellites(const MXM_5X_INSTANCE_s *const kpkInstance)
Get number of satellites.
Headers for the driver for the MAX17841B ASCI and MAX1785x monitoring chip.
MXM_STATEMACHINE_5X_e
States of the Battery Management Protocol state-machine.
@ MXM_STATEMACH_5X_INIT
@ MXM_STATEMACH_5X_IDLE
@ MXM_STATEMACH_5X_READALL
@ MXM_STATEMACH_5X_WRITEALL
@ MXM_STATEMACH_5X_WRITE_DEVICE
@ MXM_STATEMACH_5X_UNINITIALIZED
@ MXM_STATEMACH_5X_MAXSTATE
@ MXM_STATEMACH_5X_41B_FMEA_CHECK
#define MXM_5X_RX_BUFFER_LEN
MXM_5X_STATE_REQUEST_STATUS_e
Request status of Battery Management Protocol states.
@ MXM_5X_STATE_PROCESSED
@ MXM_5X_STATE_UNPROCESSED
@ MXM_5X_STATE_ERROR
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_RECEIVE_BUFFER
@ MXM_5X_WRITEALL_UART_TRANSACTION
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_HELLOALL
@ MXM_5X_READALL_UART_TRANSACTION
@ MXM_5X_READALL_CHECK_CRC
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_EN_PREAMBLES
@ MXM_5X_READALL_GET_DC
@ MXM_5X_41B_FMEA_REQUEST
@ MXM_5X_INIT_ENABLE_RX_INTERRUPT_FLAGS
@ MXM_5X_WRITE_DEVICE_UART_TRANSACTION
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_RECEIVE_BUFFER_2
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_HELLOALL_VERIFY_MSG_AND_COUNT
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_WAIT_FOR_RX_STATUS_BUSY
@ MXM_5X_INIT_41B_INIT
@ MXM_5X_ENTRY_SUBSTATE
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_WAIT_FOR_RX_STATUS_EMPTY
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_CLEAR_TRANSMIT_BUFFER
@ MXM_5X_INIT_ENABLE_KEEP_ALIVE
@ MXM_5X_41B_FMEA_CHECK
@ MXM_5X_INIT_WAKE_UP_SATELLITE_DEVICES_DIS_PREAMBLES
#define BATTERY_MANAGEMENT_HELLOALL
HELLOALL message.
#define BATTERY_MANAGEMENT_WRITEALL
WRITEALL message (write single register of all daisy-chain devices)
#define BATTERY_MANAGEMENT_READALL
READALL message (read single register of all daisy-chain devices)
#define BATTERY_MANAGEMENT_TX_LENGTH_READALL
Battery Management Protocol lengths of TX buffer.
#define HELLOALL_START_SEED
#define DATA_CHECK_BYTE_SEED
#define COMMAND_BUFFER_LENGTH
#define BATTERY_MANAGEMENT_WRITEDEVICE
WRITEDEVICE message (write single register of a single device)
#define MXM_41B_REG_FALSE
uint8_t MXM_41B_REG_BIT_VALUE
Bit-values for registers.
#define MXM_41B_REG_TRUE
uint8_t MXM_CRC8(uint16_t *pData, int32_t lenData)
Compute CRC8 with initial value set to 0x00.
Definition: mxm_crc8.c:120
Struct for the state-variable of state-machine.
Definition: mxm_17841b.h:149
5x statemachine structure
uint8_t commandBufferCurrentLength
Length of Command Buffer.
MXM_5X_COMMAND_PAYLOAD_s commandPayload
MXM_5X_SUBSTATES_e substate
MXM_41B_STATE_REQUEST_STATUS_e status41b
MXM_STATEMACHINE_5X_e state
STD_RETURN_TYPE_e numberOfSatellitesIsGood
Command Buffer.
uint8_t lastDCByte
Tracks the last received DC byte.
uint16_t commandBuffer[COMMAND_BUFFER_LENGTH]
uint8_t numberOfSatellites
Number of satellites.
uint16_t rxBuffer[MXM_5X_RX_BUFFER_LEN]
MXM_5X_STATE_REQUEST_STATUS_e * processed