fram.c

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 *
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/**
 * @file    fram.c
 * @author  foxBMS Team
 * @date    2020-03-05 (date of creation)
 * @updated 2021-07-14 (date of last update)
 * @ingroup DRIVERS
 * @prefix  FRAM
 *
 * @brief   Driver for the FRAM module
 *
 *
 */
 
/*========== Includes =======================================================*/
#include "fram.h"
 
#include "io.h"
#include "mcu.h"
#include "os.h"
#include "spi.h"
 
/*========== Macros and Definitions =========================================*/
 
/** delay in µs after writing the FRAM */
#define FRAM_DELAY_AFTER_WRITE_ENABLE_US (5U)
 
/** control commands for the FRAM */
/**@{*/
#define FRAM_WRITECOMMAND       (0x02u)
#define FRAM_READCOMMAND        (0x03u)
#define FRAM_WRITEENABLECOMMAND (0x06u)
/**@}*/
 
/** maximal memory address of the FRAM */
#define FRAM_MAX_ADDRESS (0x3FFFFu)
 
/*========== Static Constant and Variable Definitions =======================*/
 
/*========== Extern Constant and Variable Definitions =======================*/
 
/*========== Static Function Prototypes =====================================*/
 
/*========== Static Function Implementations ================================*/
 
/*========== Extern Function Implementations ================================*/
 
extern void FRAM_Initialize(void) {
    uint32_t address = 0;
 
    /* find address of all variables in FRAM  by parsing length of data*/
    for (uint16_t i = 0u; i < FRAM_BLOCK_MAX; i++) {
        (&fram_base_header[0u] + i)->address = address;
        address += (&fram_base_header[0u] + i)->datalength;
    }
 
    /* ASSERT that size of variables does not exceed FRAM size */
    FAS_ASSERT(!(address > FRAM_MAX_ADDRESS));
}
 
extern STD_RETURN_TYPE_e FRAM_Write(FRAM_BLOCK_ID_e blockId) {
    uint8_t *wrt_ptr         = NULL_PTR;
    uint32_t address         = 0;
    uint16_t write           = 0;
    uint16_t read            = 0;
    uint16_t size            = 0;
    STD_RETURN_TYPE_e retVal = STD_NOT_OK;
 
    retVal = SPI_Lock(SPI_Interface3);
 
    if (retVal == STD_OK) {
        address = (&fram_base_header[0] + blockId)->address;
 
        wrt_ptr = (uint8_t *)((&fram_base_header[0] + blockId)->blockptr);
        size    = (&fram_base_header[0] + blockId)->datalength;
 
        /* send write enable command */
        IO_PinReset(spi_framInterface.pGioPort, spi_framInterface.csPin);
        write = FRAM_WRITEENABLECOMMAND;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
        IO_PinSet(spi_framInterface.pGioPort, spi_framInterface.csPin);
        MCU_delay_us(FRAM_DELAY_AFTER_WRITE_ENABLE_US);
 
        /* send data to write */
        /* set chip select low to start transmission */
        IO_PinReset(spi_framInterface.pGioPort, spi_framInterface.csPin);
 
        /* send write command */
        write = FRAM_WRITECOMMAND;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
 
        /* send upper part of address */
        write = (address & 0x3F0000u) >> 16u;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
 
        /* send middle part of address */
        write = (address & 0xFF00u) >> 8u;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
 
        /* send lower part of address */
        write = address & 0xFFu;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
 
        while (size > 0u) {
            write = (uint16_t)(*wrt_ptr);
            SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
            wrt_ptr++;
            size--;
        }
 
        /* set chip select high to start transmission */
        IO_PinSet(spi_framInterface.pGioPort, spi_framInterface.csPin);
 
        SPI_Unlock(SPI_Interface3);
    }
 
    return retVal;
}
 
extern STD_RETURN_TYPE_e FRAM_Read(FRAM_BLOCK_ID_e blockId) {
    uint8_t *rd_ptr          = NULL_PTR;
    uint32_t address         = 0;
    uint16_t write           = 0;
    uint16_t read            = 0;
    uint16_t size            = 0;
    STD_RETURN_TYPE_e retVal = STD_NOT_OK;
 
    retVal = SPI_Lock(SPI_Interface3);
 
    if (retVal == STD_OK) {
        address = (&fram_base_header[0] + blockId)->address;
 
        rd_ptr = (uint8_t *)((&fram_base_header[0] + blockId)->blockptr);
        size   = (&fram_base_header[0] + blockId)->datalength;
 
        /* get data to be read */
        /* set chip select low to start transmission */
        IO_PinReset(spi_framInterface.pGioPort, spi_framInterface.csPin);
 
        /* send write command */
        write = FRAM_READCOMMAND;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
 
        /* send upper part of address */
        write = (address & 0x3F0000u) >> 16u;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
 
        /* send middle part of address */
        write = (address & 0xFF00u) >> 8u;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
 
        /* send lower part of address */
        write = address & 0xFFu;
        SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
 
        write = 0;
        while (size > 0u) {
            SPI_DirectlyTransmitReceiveData(&spi_framInterface, &write, &read, 1);
            *rd_ptr = read;
            rd_ptr++;
            size--;
        }
 
        /* set chip select high to start transmission */
        IO_PinSet(spi_framInterface.pGioPort, spi_framInterface.csPin);
 
        SPI_Unlock(SPI_Interface3);
    }
 
    return retVal;
}
 
/*========== Externalized Static Function Implementations (Unit Test) =======*/