59 #ifndef FOXBMS__MXM_BITEXTRACT_H_
60 #define FOXBMS__MXM_BITEXTRACT_H_
72 #define MXM_41B_REG_FALSE ((MXM_41B_REG_BIT_VALUE)0x00u)
74 #define MXM_41B_REG_TRUE ((MXM_41B_REG_BIT_VALUE)0x01u)
76 #define MXM_41B_REG_BAUD_RATE_500KBPS ((MXM_41B_REG_BIT_VALUE)0x00u)
78 #define MXM_41B_REG_BAUD_RATE_500KBPS_ALT ((MXM_41B_REG_BIT_VALUE)0x01u)
80 #define MXM_41B_REG_BAUD_RATE_1MBPS ((MXM_41B_REG_BIT_VALUE)0x02u)
82 #define MXM_41B_REG_BAUD_RATE_2MBPS ((MXM_41B_REG_BIT_VALUE)0x03u)
84 #define MXM_41B_REG_KEEP_ALIVE_0US ((MXM_41B_REG_BIT_VALUE)0x00u)
86 #define MXM_41B_REG_KEEP_ALIVE_10US ((MXM_41B_REG_BIT_VALUE)0x01u)
88 #define MXM_41B_REG_KEEP_ALIVE_20US ((MXM_41B_REG_BIT_VALUE)0x02u)
90 #define MXM_41B_REG_KEEP_ALIVE_40US ((MXM_41B_REG_BIT_VALUE)0x03u)
92 #define MXM_41B_REG_KEEP_ALIVE_80US ((MXM_41B_REG_BIT_VALUE)0x04u)
94 #define MXM_41B_REG_KEEP_ALIVE_160US ((MXM_41B_REG_BIT_VALUE)0x05u)
96 #define MXM_41B_REG_KEEP_ALIVE_320US ((MXM_41B_REG_BIT_VALUE)0x06u)
98 #define MXM_41B_REG_KEEP_ALIVE_640US ((MXM_41B_REG_BIT_VALUE)0x07u)
100 #define MXM_41B_REG_KEEP_ALIVE_1280US ((MXM_41B_REG_BIT_VALUE)0x08u)
102 #define MXM_41B_REG_KEEP_ALIVE_2560US ((MXM_41B_REG_BIT_VALUE)0x09u)
104 #define MXM_41B_REG_KEEP_ALIVE_5120US ((MXM_41B_REG_BIT_VALUE)0x0Au)
106 #define MXM_41B_REG_KEEP_ALIVE_10240US ((MXM_41B_REG_BIT_VALUE)0x0Bu)
108 #define MXM_41B_REG_KEEP_ALIVE_INF_DLY ((MXM_41B_REG_BIT_VALUE)0x0Fu)
114 #define MXM_REG_MASK(start, end) (((1u << ((end) - (start) + 1u)) - 1u) << (start))
119 #define MXM_41B_TX_PREAMBLES ((MXM_41B_REG_BITS)5u)
121 #define MXM_41B_KEEP_ALIVE ((MXM_41B_REG_BITS)0u)
123 #define MXM_41B_RX_ERROR ((MXM_41B_REG_BITS)7u)
125 #define MXM_41B_RX_BUSY_STATUS ((MXM_41B_REG_BITS)5u)
127 #define MXM_41B_RX_OVERFLOW_INT_ENABLE ((MXM_41B_REG_BITS)3u)
129 #define MXM_41B_RX_OVERFLOW_STATUS ((MXM_41B_REG_BITS)3u)
131 #define MXM_41B_RX_STOP_STATUS ((MXM_41B_REG_BITS)1u)
133 #define MXM_41B_RX_EMPTY_STATUS ((MXM_41B_REG_BITS)0u)
153 uint8_t numberOfBits,
General macros and definitions for the whole platform.