foxBMS - Unit Tests  1.2.1
The foxBMS Unit Tests API Documentation
spi_cfg.h
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41 
42 /**
43  * @file spi_cfg.h
44  * @author foxBMS Team
45  * @date 2020-03-05 (date of creation)
46  * @updated 2021-12-08 (date of last update)
47  * @ingroup DRIVERS_CONFIGURATION
48  * @prefix SPI
49  *
50  * @brief Headers for the configuration for the SPI module
51  *
52  *
53  */
54 
55 #ifndef FOXBMS__SPI_CFG_H_
56 #define FOXBMS__SPI_CFG_H_
57 
58 /*========== Includes =======================================================*/
59 #include "general.h"
60 
61 #include "battery_system_cfg.h"
62 
63 #include "HL_het.h"
64 #include "HL_spi.h"
65 
66 /*========== Macros and Definitions =========================================*/
67 
68 /** Index for the SPI nodes @{ */
69 #define SPI_SPI1_INDEX (0u)
70 #define SPI_SPI2_INDEX (1u)
71 #define SPI_SPI3_INDEX (2u)
72 #define SPI_SPI4_INDEX (3u)
73 #define SPI_SPI5_INDEX (4u)
74 /**@}*/
75 
76 /** Bit in SPIDAT1 register that activates hardware Chip Select hold */
77 #define SPI_CSHOLD_BIT (0x10000000U)
78 
79 /** Bit in SPIDAT1 register that activates delay between words */
80 #define SPI_WDEL_BIT (0x04000000U)
81 
82 /** Position of CSNR field in SPIDAT1 register */
83 #define SPI_HARDWARE_CHIP_SELECT_FIELD_POSITION (16U)
84 
85 /** Position of DFSEL field in SPIDAT1 register */
86 #define SPI_DATA_FORMAT_FIELD_POSITION (24U)
87 
88 /** Position of TX buffer empty flag in SPIFLG register */
89 #define SPI_TX_BUFFER_EMPTY_FLAG_POSITION (9u)
90 
91 /** Mask used to clear all HW CS bits */
92 #define SPI_PC0_CLEAR_HW_CS_MASK (0xFFFFFF00u)
93 
94 /** Time to avoid infinite loop when waiting for Tx empty flag in a while loop */
95 #define SPI_TX_EMPTY_TIMEOUT_ITERATIONS (6000u)
96 
97 /** Max number of hardware chip select pins */
98 #define SPI_MAX_NUMBER_HW_CS (6u)
99 
100 /* TODO: check definition of SPI nodes depending on target hardware */
101 /** SPI defines for LTC */
102 #define LTC_SPI_NODE (spiREG1)
103 
104 /** GIO defines for SPI for Smart Power Switches @{ */
105 #define SPS_SPI_CS_GIOPORT (hetREG2->DOUT)
106 #define SPS_SPI_CS_GIOPORT_DIR (hetREG2->DIR)
107 #define SPS_SPI_CS_PIN (1u)
108 /**@}*/
109 
110 /**
111  * SPI defines for NXP MC33775A
112  * @{
113  */
114 #define N775_SPI_TX_NODE (spiREG1)
115 #define N775_SPI_TX_GIOPORT (N775_SPI_TX_NODE->PC3)
116 #define N775_SPI_TX_CS_PIN (2U)
117 
118 #define N775_SPI_RX_NODE (spiREG5)
119 #define N775_SPI_RX_GIOPORT (N775_SPI_TX_NODE->PC3)
120 #define N775_SPI_RX_CS_PIN (2U)
121 /**@}*/
122 
123 /** enum for spi interface state */
124 typedef enum SPI_BUSY_STATE {
128 
129 /* INCLUDE MARKER FOR THE DOCUMENTATION; DO NOT MOVE spi-documentation-cs-type-start-include */
130 /** type of chip select for spi */
131 typedef enum SPI_CHIP_SELECT_TYPE {
135 /* INCLUDE MARKER FOR THE DOCUMENTATION; DO NOT MOVE spi-documentation-cs-type-stop-include */
136 
137 /* INCLUDE MARKER FOR THE DOCUMENTATION; DO NOT MOVE spi-documentation-configuration-start-include */
138 /** configuration of the SPI interface */
139 typedef struct SPI_INTERFACE_CONFIG {
140  spiDAT1_t *pConfig;
141  spiBASE_t *pNode;
142  volatile uint32_t *pGioPort;
143  uint32_t csPin;
146 /* INCLUDE MARKER FOR THE DOCUMENTATION; DO NOT MOVE spi-documentation-configuration-stop-include */
147 
148 /*========== Extern Constant and Variable Declarations ======================*/
158 
160 
161 extern const uint8_t spi_nrBusyFlags;
162 
163 /*========== Extern Function Prototypes =====================================*/
164 /**
165  * @brief Switch the SPS spi handle to high speed
166  * @param[out] pSpiSpsInterface handle of the SPS spi config
167  */
168 extern void SPI_SpsInterfaceSwitchToHighSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface);
169 
170 /**
171  * @brief Switch the SPS spi handle to low speed
172  * @param[out] pSpiSpsInterface handle of the SPS spi config
173  */
174 extern void SPI_SpsInterfaceSwitchToLowSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface);
175 
176 /*========== Externalized Static Functions Prototypes (Unit Test) ===========*/
177 
178 #endif /* FOXBMS__SPI_CFG_H_ */
Configuration of the battery system (e.g., number of battery modules, battery cells,...
#define BS_NR_OF_STRINGS
General macros and definitions for the whole platform.
void SPI_SpsInterfaceSwitchToLowSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to low speed.
Definition: spi_cfg.c:350
SPI_BUSY_STATE
Definition: spi_cfg.h:124
@ SPI_IDLE
Definition: spi_cfg.h:125
@ SPI_BUSY
Definition: spi_cfg.h:126
SPI_INTERFACE_CONFIG_s spi_MxmInterface
Definition: spi_cfg.c:225
SPI_INTERFACE_CONFIG_s spi_adc0Interface
Definition: spi_cfg.c:302
SPI_INTERFACE_CONFIG_s spi_kSbcMcuInterface
Definition: spi_cfg.c:320
SPI_INTERFACE_CONFIG_s spi_nxp775InterfaceTx[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:234
SPI_BUSY_STATE_e spi_busyFlags[]
Definition: spi_cfg.c:329
SPI_CHIP_SELECT_TYPE
Definition: spi_cfg.h:131
@ SPI_CHIP_SELECT_SOFTWARE
Definition: spi_cfg.h:133
@ SPI_CHIP_SELECT_HARDWARE
Definition: spi_cfg.h:132
enum SPI_BUSY_STATE SPI_BUSY_STATE_e
SPI_INTERFACE_CONFIG_s spi_framInterface
Definition: spi_cfg.c:284
enum SPI_CHIP_SELECT_TYPE SPI_CHIP_SELECT_TYPE_e
SPI_INTERFACE_CONFIG_s spi_adc1Interface
Definition: spi_cfg.c:311
void SPI_SpsInterfaceSwitchToHighSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to high speed.
Definition: spi_cfg.c:345
struct SPI_INTERFACE_CONFIG SPI_INTERFACE_CONFIG_s
SPI_INTERFACE_CONFIG_s spi_nxp775InterfaceRx[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:259
SPI_INTERFACE_CONFIG_s spi_ltcInterface[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:200
const uint8_t spi_nrBusyFlags
Definition: spi_cfg.c:338
SPI_INTERFACE_CONFIG_s spi_spsInterface
Definition: spi_cfg.c:293
spiDAT1_t * pConfig
Definition: spi_cfg.h:140
SPI_CHIP_SELECT_TYPE_e csType
Definition: spi_cfg.h:144
spiBASE_t * pNode
Definition: spi_cfg.h:141
volatile uint32_t * pGioPort
Definition: spi_cfg.h:142