55 #ifndef FOXBMS__SPI_CFG_H_
56 #define FOXBMS__SPI_CFG_H_
69 #define SPI_SPI1_INDEX (0u)
70 #define SPI_SPI2_INDEX (1u)
71 #define SPI_SPI3_INDEX (2u)
72 #define SPI_SPI4_INDEX (3u)
73 #define SPI_SPI5_INDEX (4u)
77 #define SPI_CSHOLD_BIT (0x10000000U)
80 #define SPI_WDEL_BIT (0x04000000U)
83 #define SPI_HARDWARE_CHIP_SELECT_FIELD_POSITION (16U)
86 #define SPI_DATA_FORMAT_FIELD_POSITION (24U)
89 #define SPI_TX_BUFFER_EMPTY_FLAG_POSITION (9u)
92 #define SPI_PC0_CLEAR_HW_CS_MASK (0xFFFFFF00u)
95 #define SPI_TX_EMPTY_TIMEOUT_ITERATIONS (6000u)
98 #define SPI_MAX_NUMBER_HW_CS (6u)
102 #define LTC_SPI_NODE (spiREG1)
105 #define SPS_SPI_CS_GIOPORT (hetREG2->DOUT)
106 #define SPS_SPI_CS_GIOPORT_DIR (hetREG2->DIR)
107 #define SPS_SPI_CS_PIN (1u)
114 #define N775_SPI_TX_NODE (spiREG1)
115 #define N775_SPI_TX_GIOPORT (N775_SPI_TX_NODE->PC3)
116 #define N775_SPI_TX_CS_PIN (2U)
118 #define N775_SPI_RX_NODE (spiREG5)
119 #define N775_SPI_RX_GIOPORT (N775_SPI_TX_NODE->PC3)
120 #define N775_SPI_RX_CS_PIN (2U)
Configuration of the battery system (e.g., number of battery modules, battery cells,...
General macros and definitions for the whole platform.
void SPI_SpsInterfaceSwitchToLowSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to low speed.
SPI_INTERFACE_CONFIG_s spi_MxmInterface
SPI_INTERFACE_CONFIG_s spi_adc0Interface
SPI_INTERFACE_CONFIG_s spi_kSbcMcuInterface
SPI_INTERFACE_CONFIG_s spi_nxp775InterfaceTx[BS_NR_OF_STRINGS]
SPI_BUSY_STATE_e spi_busyFlags[]
@ SPI_CHIP_SELECT_SOFTWARE
@ SPI_CHIP_SELECT_HARDWARE
enum SPI_BUSY_STATE SPI_BUSY_STATE_e
SPI_INTERFACE_CONFIG_s spi_framInterface
enum SPI_CHIP_SELECT_TYPE SPI_CHIP_SELECT_TYPE_e
SPI_INTERFACE_CONFIG_s spi_adc1Interface
void SPI_SpsInterfaceSwitchToHighSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to high speed.
struct SPI_INTERFACE_CONFIG SPI_INTERFACE_CONFIG_s
SPI_INTERFACE_CONFIG_s spi_nxp775InterfaceRx[BS_NR_OF_STRINGS]
SPI_INTERFACE_CONFIG_s spi_ltcInterface[BS_NR_OF_STRINGS]
const uint8_t spi_nrBusyFlags
SPI_INTERFACE_CONFIG_s spi_spsInterface
SPI_CHIP_SELECT_TYPE_e csType
volatile uint32_t * pGioPort