60 #ifndef FOXBMS__MXM_BITEXTRACT_H_
61 #define FOXBMS__MXM_BITEXTRACT_H_
73 #define MXM_41B_REG_FALSE ((MXM_41B_REG_BIT_VALUE)0x00u)
75 #define MXM_41B_REG_TRUE ((MXM_41B_REG_BIT_VALUE)0x01u)
77 #define MXM_41B_REG_BAUD_RATE_500KBPS ((MXM_41B_REG_BIT_VALUE)0x00u)
79 #define MXM_41B_REG_BAUD_RATE_500KBPS_ALT ((MXM_41B_REG_BIT_VALUE)0x01u)
81 #define MXM_41B_REG_BAUD_RATE_1MBPS ((MXM_41B_REG_BIT_VALUE)0x02u)
83 #define MXM_41B_REG_BAUD_RATE_2MBPS ((MXM_41B_REG_BIT_VALUE)0x03u)
85 #define MXM_41B_REG_KEEP_ALIVE_0US ((MXM_41B_REG_BIT_VALUE)0x00u)
87 #define MXM_41B_REG_KEEP_ALIVE_10US ((MXM_41B_REG_BIT_VALUE)0x01u)
89 #define MXM_41B_REG_KEEP_ALIVE_20US ((MXM_41B_REG_BIT_VALUE)0x02u)
91 #define MXM_41B_REG_KEEP_ALIVE_40US ((MXM_41B_REG_BIT_VALUE)0x03u)
93 #define MXM_41B_REG_KEEP_ALIVE_80US ((MXM_41B_REG_BIT_VALUE)0x04u)
95 #define MXM_41B_REG_KEEP_ALIVE_160US ((MXM_41B_REG_BIT_VALUE)0x05u)
97 #define MXM_41B_REG_KEEP_ALIVE_320US ((MXM_41B_REG_BIT_VALUE)0x06u)
99 #define MXM_41B_REG_KEEP_ALIVE_640US ((MXM_41B_REG_BIT_VALUE)0x07u)
101 #define MXM_41B_REG_KEEP_ALIVE_1280US ((MXM_41B_REG_BIT_VALUE)0x08u)
103 #define MXM_41B_REG_KEEP_ALIVE_2560US ((MXM_41B_REG_BIT_VALUE)0x09u)
105 #define MXM_41B_REG_KEEP_ALIVE_5120US ((MXM_41B_REG_BIT_VALUE)0x0Au)
107 #define MXM_41B_REG_KEEP_ALIVE_10240US ((MXM_41B_REG_BIT_VALUE)0x0Bu)
109 #define MXM_41B_REG_KEEP_ALIVE_INF_DLY ((MXM_41B_REG_BIT_VALUE)0x0Fu)
115 #define MXM_REG_MASK(start, end) (((1u << ((end) - (start) + 1u)) - 1u) << (start))
120 #define MXM_41B_TX_PREAMBLES ((MXM_41B_REG_BITS)5u)
122 #define MXM_41B_KEEP_ALIVE ((MXM_41B_REG_BITS)0u)
124 #define MXM_41B_RX_ERROR ((MXM_41B_REG_BITS)7u)
126 #define MXM_41B_RX_BUSY_STATUS ((MXM_41B_REG_BITS)5u)
128 #define MXM_41B_RX_OVERFLOW_INT_ENABLE ((MXM_41B_REG_BITS)3u)
130 #define MXM_41B_RX_OVERFLOW_STATUS ((MXM_41B_REG_BITS)3u)
132 #define MXM_41B_RX_STOP_STATUS ((MXM_41B_REG_BITS)1u)
134 #define MXM_41B_RX_EMPTY_STATUS ((MXM_41B_REG_BITS)0u)
154 uint8_t numberOfBits,
General macros and definitions for the whole platform.