crc.c

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/**
 * @file    crc.c
 * @author  foxBMS Team
 * @date    2022-02-22 (date of creation)
 * @updated 2022-10-27 (date of last update)
 * @version v1.4.1
 * @ingroup DRIVERS
 * @prefix  CRC
 *
 * @brief   crc module implementation
 *
 * @details Uses the system CRC hardware for data integrity calculation
 */
 
/*========== Includes =======================================================*/
#include "crc.h"
 
/*========== Macros and Definitions =========================================*/
 
/*========== Static Constant and Variable Definitions =======================*/
 
/*========== Extern Constant and Variable Definitions =======================*/
 
/*========== Static Function Prototypes =====================================*/
 
/*========== Static Function Implementations ================================*/
 
/*========== Extern Function Implementations ================================*/
 
extern STD_RETURN_TYPE_e CRC_CalculateCrc(uint64_t *pCrc, uint8_t *pData, uint32_t lengthInBytes) {
    static uint16_t crcCalls         = 0u;
    CRC_REGISTER_SIDE_e registerSide = CRC_REGISTER_LOW;
    uint32_t dataBufferLow           = 0u;
    uint32_t dataBufferHigh          = 0u;
    uint32_t remainingBytes          = lengthInBytes;
    uint32_t remainingData           = 0u;
    STD_RETURN_TYPE_e retVal         = STD_OK;
 
    FAS_ASSERT(pCrc != NULL_PTR);
    FAS_ASSERT(pData != NULL_PTR);
 
    uint8_t *pRead = pData;
 
    if (crcCalls == 0u) {
        crcCalls++;
 
        /* Set mode to Data Capture Mode, otherwise writing the seed
       starts the computation */
        crcREG1->CTRL2 &= CRC_DATA_CAPTURE_MODE_CLEAR_MASK;
        /* Set seed*/
        crcREG1->PSA_SIGREGH1 = CRC_SEED_HIGH;
        crcREG1->PSA_SIGREGL1 = CRC_SEED_LOW;
        /* Set mode to Full-CPU Mode to start the computation when writing the data*/
        crcREG1->CTRL2 |= CRC_FULL_CPU_MODE_SET_MASK;
 
        /* AXIVION Next Codeline Style MisraC2012-11.3: 64 bit access needed, partial 32 bit access starts computation */
        /* Pointer to access the two signature registers, where input data will be written */
        volatile uint64_t *pCrcRegister = (volatile uint64 *)(&crcREG1->PSA_SIGREGL1);
 
        /* Treat packets of 64 bit data */
        while (remainingBytes >= CRC_REGISTER_SIZE_IN_BYTES) {
            /* Invert two 32 bit chunks before 64 bit write, due to big endian */
            if (registerSide == CRC_REGISTER_LOW) {
                dataBufferLow = 0u;
                for (uint8_t i = 0u; i < CRC_REGISTER_SIZE_IN_BYTES; i++) {
                    uint8_t dataBuffer = *(pRead + i);
                    dataBufferLow |= ((uint32_t)dataBuffer) << ((CRC_REVERSE_BYTES_ORDER - i) * CRC_BYTE_SIZE_IN_BITS);
                }
                registerSide = CRC_REGISTER_HIGH;
            } else { /* registerSide is CRC_REGISTER_HIGH */
                dataBufferHigh = 0u;
                for (uint8_t i = 0u; i < CRC_REGISTER_SIZE_IN_BYTES; i++) {
                    uint8_t dataBuffer = *(pRead + i);
                    dataBufferHigh |= ((uint32_t)dataBuffer) << ((CRC_REVERSE_BYTES_ORDER - i) * CRC_BYTE_SIZE_IN_BITS);
                }
                /* Signature low and high available, write to hardware register */
                uint64_t crcData = (((uint64_t)dataBufferHigh) << CRC_REGISTER_SIZE_IN_BITS) | dataBufferLow;
                *pCrcRegister    = crcData;
                registerSide     = CRC_REGISTER_LOW;
            }
            pRead = (pRead + CRC_REGISTER_SIZE_IN_BYTES);
            remainingBytes -= CRC_REGISTER_SIZE_IN_BYTES;
        }
 
        if (remainingBytes > 0u) {
            /* Now treat last packet that is less than 32 bits if existing */
            /* Get data in a 32 bit variable, pad with 0 */
            while (remainingBytes > 0u) {
                uint8_t dataBuffer = *pRead;
                remainingData |= ((uint32_t)(dataBuffer)) << (CRC_BYTE_SIZE_IN_BITS * remainingBytes);
                pRead++;
                remainingBytes--;
            }
            if (registerSide == CRC_REGISTER_LOW) {
                dataBufferLow = remainingData;
                registerSide  = CRC_REGISTER_HIGH;
            } else { /* registerSide is CRC_REGISTER_HIGH */
                dataBufferHigh = remainingData;
                /* Signature low and high available, write to hardware register */
                uint64_t crcData = (((uint64_t)dataBufferHigh) << CRC_REGISTER_SIZE_IN_BITS) | dataBufferLow;
                *pCrcRegister    = crcData;
                registerSide     = CRC_REGISTER_LOW;
            }
        }
 
        /* No data remaining but only low register data available: compute CRC */
        if (registerSide == CRC_REGISTER_HIGH) {
            crcREG1->PSA_SIGREGL1 = dataBufferLow;
        }
 
        *pCrc = crcREG1->PSA_SIGREGL1;
        *pCrc |= ((uint64_t)crcREG1->PSA_SIGREGH1) << CRC_REGISTER_SIZE_IN_BITS;
        crcCalls--;
    } else {
        *pCrc  = 0u;
        retVal = STD_NOT_OK;
    }
 
    return retVal;
}
/*================== Static functions ======================================*/
 
/*========== Externalized Static Function Implementations (Unit Test) =======*/