foxBMS  1.5.0
The foxBMS Battery Management System API Documentation
crc.c
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41 
42 /**
43  * @file crc.c
44  * @author foxBMS Team
45  * @date 2022-02-22 (date of creation)
46  * @updated 2023-02-03 (date of last update)
47  * @version v1.5.0
48  * @ingroup DRIVERS
49  * @prefix CRC
50  *
51  * @brief crc module implementation
52  *
53  * @details Uses the system CRC hardware for data integrity calculation
54  */
55 
56 /*========== Includes =======================================================*/
57 #include "crc.h"
58 
59 #include "fassert.h"
60 #include "fstd_types.h"
61 
62 #include <stdint.h>
63 
64 /*========== Macros and Definitions =========================================*/
65 
66 /*========== Static Constant and Variable Definitions =======================*/
67 
68 /*========== Extern Constant and Variable Definitions =======================*/
69 
70 /*========== Static Function Prototypes =====================================*/
71 
72 /*========== Static Function Implementations ================================*/
73 
74 /*========== Extern Function Implementations ================================*/
75 
76 extern STD_RETURN_TYPE_e CRC_CalculateCrc(uint64_t *pCrc, uint8_t *pData, uint32_t lengthInBytes) {
77  static uint16_t crcCalls = 0u;
79  uint32_t dataBufferLow = 0u;
80  uint32_t dataBufferHigh = 0u;
81  uint32_t remainingBytes = lengthInBytes;
82  uint32_t remainingData = 0u;
83  STD_RETURN_TYPE_e retVal = STD_OK;
84 
85  FAS_ASSERT(pCrc != NULL_PTR);
86  FAS_ASSERT(pData != NULL_PTR);
87 
88  uint8_t *pRead = pData;
89 
90  if (crcCalls == 0u) {
91  crcCalls++;
92 
93  /* Set mode to Data Capture Mode, otherwise writing the seed
94  starts the computation */
95  crcREG1->CTRL2 &= CRC_DATA_CAPTURE_MODE_CLEAR_MASK;
96  /* Set seed*/
97  crcREG1->PSA_SIGREGH1 = CRC_SEED_HIGH;
98  crcREG1->PSA_SIGREGL1 = CRC_SEED_LOW;
99  /* Set mode to Full-CPU Mode to start the computation when writing the data*/
100  crcREG1->CTRL2 |= CRC_FULL_CPU_MODE_SET_MASK;
101 
102  /* AXIVION Next Codeline Style MisraC2012-11.3: 64 bit access needed, partial 32 bit access starts computation */
103  /* Pointer to access the two signature registers, where input data will be written */
104  volatile uint64_t *pCrcRegister = (volatile uint64 *)(&crcREG1->PSA_SIGREGL1);
105 
106  /* Treat packets of 64 bit data */
107  while (remainingBytes >= CRC_REGISTER_SIZE_IN_BYTES) {
108  /* Invert two 32 bit chunks before 64 bit write, due to big endian */
109  if (registerSide == CRC_REGISTER_LOW) {
110  dataBufferLow = 0u;
111  for (uint8_t i = 0u; i < CRC_REGISTER_SIZE_IN_BYTES; i++) {
112  uint8_t dataBuffer = *(pRead + i);
113  dataBufferLow |= ((uint32_t)dataBuffer) << ((CRC_REVERSE_BYTES_ORDER - i) * CRC_BYTE_SIZE_IN_BITS);
114  }
115  registerSide = CRC_REGISTER_HIGH;
116  } else { /* registerSide is CRC_REGISTER_HIGH */
117  dataBufferHigh = 0u;
118  for (uint8_t i = 0u; i < CRC_REGISTER_SIZE_IN_BYTES; i++) {
119  uint8_t dataBuffer = *(pRead + i);
120  dataBufferHigh |= ((uint32_t)dataBuffer) << ((CRC_REVERSE_BYTES_ORDER - i) * CRC_BYTE_SIZE_IN_BITS);
121  }
122  /* Signature low and high available, write to hardware register */
123  uint64_t crcData = (((uint64_t)dataBufferHigh) << CRC_REGISTER_SIZE_IN_BITS) | dataBufferLow;
124  *pCrcRegister = crcData;
125  registerSide = CRC_REGISTER_LOW;
126  }
127  pRead = (pRead + CRC_REGISTER_SIZE_IN_BYTES);
128  remainingBytes -= CRC_REGISTER_SIZE_IN_BYTES;
129  }
130 
131  if (remainingBytes > 0u) {
132  /* Now treat last packet that is less than 32 bits if existing */
133  /* Get data in a 32 bit variable, pad with 0 */
134  while (remainingBytes > 0u) {
135  uint8_t dataBuffer = *pRead;
136  remainingData |= ((uint32_t)(dataBuffer)) << (CRC_BYTE_SIZE_IN_BITS * remainingBytes);
137  pRead++;
138  remainingBytes--;
139  }
140  if (registerSide == CRC_REGISTER_LOW) {
141  dataBufferLow = remainingData;
142  registerSide = CRC_REGISTER_HIGH;
143  } else { /* registerSide is CRC_REGISTER_HIGH */
144  dataBufferHigh = remainingData;
145  /* Signature low and high available, write to hardware register */
146  uint64_t crcData = (((uint64_t)dataBufferHigh) << CRC_REGISTER_SIZE_IN_BITS) | dataBufferLow;
147  *pCrcRegister = crcData;
148  registerSide = CRC_REGISTER_LOW;
149  }
150  }
151 
152  /* No data remaining but only low register data available: compute CRC */
153  if (registerSide == CRC_REGISTER_HIGH) {
154  crcREG1->PSA_SIGREGL1 = dataBufferLow;
155  }
156 
157  *pCrc = crcREG1->PSA_SIGREGL1;
158  *pCrc |= ((uint64_t)crcREG1->PSA_SIGREGH1) << CRC_REGISTER_SIZE_IN_BITS;
159  crcCalls--;
160  } else {
161  *pCrc = 0u;
162  retVal = STD_NOT_OK;
163  }
164 
165  return retVal;
166 }
167 /*================== Static functions ======================================*/
168 
169 /*========== Externalized Static Function Implementations (Unit Test) =======*/
170 #ifdef UNITY_UNIT_TEST
171 #endif
STD_RETURN_TYPE_e CRC_CalculateCrc(uint64_t *pCrc, uint8_t *pData, uint32_t lengthInBytes)
Computes CRC of data flow.
Definition: crc.c:76
crc module header
#define CRC_DATA_CAPTURE_MODE_CLEAR_MASK
Definition: crc.h:74
#define CRC_REGISTER_SIZE_IN_BYTES
Definition: crc.h:81
#define CRC_BYTE_SIZE_IN_BITS
Definition: crc.h:79
#define CRC_SEED_HIGH
Definition: crc.h:70
CRC_REGISTER_SIDE_e
Definition: crc.h:92
@ CRC_REGISTER_HIGH
Definition: crc.h:94
@ CRC_REGISTER_LOW
Definition: crc.h:93
#define CRC_SEED_LOW
Definition: crc.h:72
#define CRC_REVERSE_BYTES_ORDER
Definition: crc.h:85
#define CRC_FULL_CPU_MODE_SET_MASK
Definition: crc.h:76
#define CRC_REGISTER_SIZE_IN_BITS
Definition: crc.h:83
Assert macro implementation.
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
Definition: fassert.h:254
Definition of foxBMS standard types.
STD_RETURN_TYPE_e
Definition: fstd_types.h:82
@ STD_NOT_OK
Definition: fstd_types.h:84
@ STD_OK
Definition: fstd_types.h:83
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:77