dma_cfg.h

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/**
 *
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/**
 * @file    dma_cfg.h
 * @author  foxBMS Team
 * @date    2020-03-05 (date of creation)
 * @updated 2023-02-03 (date of last update)
 * @version v1.5.0
 * @ingroup DRIVERS_CONFIGURATION
 * @prefix  DMA
 *
 * @brief   Headers for the configuration for the DMA module
 *
 *
 */
 
#ifndef FOXBMS__DMA_CFG_H_
#define FOXBMS__DMA_CFG_H_
 
/*========== Includes =======================================================*/
 
#include "battery_system_cfg.h"
 
#include "HL_spi.h"
#include "HL_sys_dma.h"
 
#include <stdint.h>
 
/*========== Macros and Definitions =========================================*/
 
/* Position of initial frame counter in channel configuration register */
#define DMA_INITIAL_FRAME_COUNTER_POSITION (16u)
 
/** defines for the DMA channels */
/**@{*/
#define DMA_CHANNEL_SPI1_TX (DMA_CH0)
#define DMA_CHANNEL_SPI1_RX (DMA_CH1)
#define DMA_CHANNEL_SPI2_TX (DMA_CH2)
#define DMA_CHANNEL_SPI2_RX (DMA_CH3)
#define DMA_CHANNEL_SPI3_TX (DMA_CH4)
#define DMA_CHANNEL_SPI3_RX (DMA_CH5)
#define DMA_CHANNEL_SPI4_TX (DMA_CH6)
#define DMA_CHANNEL_SPI4_RX (DMA_CH7)
#define DMA_CHANNEL_SPI5_TX (DMA_CH8)
#define DMA_CHANNEL_SPI5_RX (DMA_CH9)
#define DMA_CHANNEL_I2C1_TX (DMA_CH10)
#define DMA_CHANNEL_I2C1_RX (DMA_CH11)
#define DMA_CHANNEL_I2C2_TX (DMA_CH12)
#define DMA_CHANNEL_I2C2_RX (DMA_CH13)
/**@}*/
 
/** defines for the DMA request lines */
/**@{*/
#define DMA_REQ_LINE_SPI1_TX (DMA_REQ1)
#define DMA_REQ_LINE_SPI1_RX (DMA_REQ0)
#define DMA_REQ_LINE_SPI2_TX (DMA_REQ3)
#define DMA_REQ_LINE_SPI2_RX (DMA_REQ2)
#define DMA_REQ_LINE_SPI3_TX (DMA_REQ15)
#define DMA_REQ_LINE_SPI3_RX (DMA_REQ14)
#define DMA_REQ_LINE_SPI4_TX (DMA_REQ25)
#define DMA_REQ_LINE_SPI4_RX (DMA_REQ24)
#define DMA_REQ_LINE_SPI5_TX (DMA_REQ31)
#define DMA_REQ_LINE_SPI5_RX (DMA_REQ30)
#define DMA_REQ_LINE_I2C1_TX (DMA_REQ11)
#define DMA_REQ_LINE_I2C1_RX (DMA_REQ10)
#define DMA_REQ_LINE_I2C2_TX (DMA_REQ33)
#define DMA_REQ_LINE_I2C2_RX (DMA_REQ32)
/**@}*/
 
/** define for the shift of an address for big endian 8bit */
#define DMA_BIG_ENDIAN_ADDRESS_8BIT (3u)
/** define for the shift of an address for big endian 16bit */
#define DMA_BIG_ENDIAN_ADDRESS_16BIT (2u)
 
/** number of spi interfaces for DMA */
#define DMA_NUMBER_SPI_INTERFACES (5u)
/** DMA Request enable bit */
#define DMAREQEN_BIT (0x10000u)
/** SPI enable bit */
#define SPIEN_BIT (0x1000000u)
 
/** DMA request line for LTC */
/**@{*/
#define DMA_REQ_LINE_LTC_TX (DMA_REQ_LINE_SPI1_TX)
#define DMA_REQ_LINE_LTC_RX (DMA_REQ_LINE_SPI1_RX)
/**@}*/
 
/** DMA request line for N775 */
/**@{**/
#define DMA_REQ_LINE_N775_TX (DMA_REQ_LINE_SPI1_TX)
#define DMA_REQ_LINE_N775_RX (DMA_REQ_LINE_SPI5_RX)
/**@}*/
 
/** describes the RX and TX DMA channels used for an SPI interface */
typedef struct {
    dmaChannel_t txChannel;
    dmaChannel_t rxChannel;
} DMA_CHANNEL_CONFIG_s;
 
/** describes the DMA requests corresponding to the DMA channel used for an SPI interface */
typedef struct {
    dmaRequest_t txRequest;
    dmaRequest_t rxRequest;
} DMA_REQUEST_CONFIG_s;
 
/*========== Extern Constant and Variable Declarations ======================*/
 
extern DMA_CHANNEL_CONFIG_s dma_spiDmaChannels[DMA_NUMBER_SPI_INTERFACES];
extern DMA_REQUEST_CONFIG_s dma_spiDmaRequests[DMA_NUMBER_SPI_INTERFACES];
extern spiBASE_t *dma_spiInterfaces[DMA_NUMBER_SPI_INTERFACES];
 
/*========== Extern Function Prototypes =====================================*/
 
/*========== Externalized Static Functions Prototypes (Unit Test) ===========*/
#ifdef UNITY_UNIT_TEST
#endif
 
#endif /* FOXBMS__DMA_CFG_H_ */