foxBMS  1.5.0
The foxBMS Battery Management System API Documentation
nxp_mc33775a-ll.c
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1 /* Copyright 2019 NXP
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22 
23 /*========== Includes =======================================================*/
24 
25 #include "nxp_mc33775a-ll.h"
26 
27 #include "spi_cfg.h"
28 
29 #include "dma.h"
30 #include "fassert.h"
31 #include "io.h"
32 #include "mcu.h"
33 #include "os.h"
34 #include "spi.h"
35 
36 #include <stdint.h>
37 
38 /*========== Macros and Definitions =========================================*/
39 
40 /** Number of words (16 bits) used for write messages */
41 #define N775_WRITE_SPI_BUFFER_SIZE (4u)
42 /** Number of words (16 bits) in read answers that do not contain data */
43 #define N775_READ_HEADER_SPI_BUFFER_SIZE (3u)
44 /**
45  * Number of words (16 bits) in read answers that contain data.
46  * Based on maximum payload, which is 4 register per answer frame.
47  */
48 #define N775_READ_PAYLOAD_SPI_BUFFER_SIZE (4u)
49 /**
50  * Maximum number of groups of registers that can be read,
51  * to limit buffer size.
52  * Groups can be of size 1 to 4 registers.
53  * One frame = header (e.g., register address) +
54  * payload (data, 1 to 4 registers)
55  */
56 #define N775_MAX_ANSWER_FRAMES (30u)
57 /** Time to wait in microseconds after a write command */
58 #define N775_WAIT_TIME_AFTER_WRITE_US (5u)
59 /** Time to wait in microseconds after a read command */
60 #define N775_WAIT_TIME_AFTER_READ_US (5u)
61 /** Timeout to wait in microseconds for SPI send interrupt. */
62 #define N775_SPI_WRITE_TIMEOUT_US (500u)
63 /**
64  * Timeout to wait in microseconds for reception of a read answer.
65  * After that time the communication is considered to have failed.
66  */
67 #define N775_SPI_READ_TIMEOUT_US (2000u)
68 
69 /*========== Static Constant and Variable Definitions =======================*/
70 static uint16_t referenceMessageCounter[BS_NR_OF_STRINGS][512]; /* fits for all possible nodes */
71 
72 #pragma SET_DATA_SECTION(".sharedRAM")
75 static uint16_t n775FromTplTxBuffer
78 static uint16_t n775FromTplRxBuffer
81 #pragma SET_DATA_SECTION()
82 
83 /*========== Extern Constant and Variable Definitions =======================*/
84 
85 /*========== Static Function Prototypes =====================================*/
86 /**
87  * @brief Copies a message to the buffer to be passed to the SPI transmit
88  * functions
89  * @param pBuffer
90  * @param message
91  */
92 static void N775_ConvertMessageToBuffer(uint16_t *pBuffer, uc_msg_t message);
93 
94 /**
95  * @brief Wait for the SPI transmit communication to complete, using notifications
96  *
97  * return N775_TX_NOTIFIED_VALUE if notification received,
98  * N775_NO_NOTIFIED_VALUE if timeout reached
99  */
100 static uint32_t N775_WaitForTxCompletedNotification(void);
101 
102 /**
103  * @brief Wait for the SPI receive communication to complete, using notifications
104  *
105  * return N775_RX_NOTIFIED_VALUE if notification received,
106  * N775_NO_NOTIFIED_VALUE if timeout reached
107  */
108 static uint32_t N775_WaitForRxCompletedNotification(void);
109 
110 /*========== Static Function Implementations ================================*/
111 
112 static void N775_ConvertMessageToBuffer(uint16_t *pBuffer, uc_msg_t message) {
113  FAS_ASSERT(pBuffer != NULL_PTR);
114  pBuffer[0u] = message.head;
115  pBuffer[1u] = message.data.dhead;
116  pBuffer[2u] = message.data.data[0u];
117  pBuffer[3u] = message.crc;
118 }
119 
120 static uint32_t N775_WaitForTxCompletedNotification(void) {
121  uint32_t notifiedValueTx = N775_NO_NOTIFIED_VALUE;
122  /**
123  * Suspend task and wait for SPI send DMA RX finished notification,
124  * clear notification value on entry and exit
125  */
127  return notifiedValueTx;
128 }
129 
130 static uint32_t N775_WaitForRxCompletedNotification(void) {
131  uint32_t notifiedValueRx = N775_NO_NOTIFIED_VALUE;
132  /**
133  * Suspend task and wait for DMA RX notification,
134  * clear notification value on entry and exit
135  */
137  return notifiedValueRx;
138 }
139 
140 /*========== Extern Function Implementations ================================*/
141 
143  uint16_t deviceAddress,
144  uint16_t registerAddress,
145  uint16_t value,
146  SPI_INTERFACE_CONFIG_s *pSpiInterface) {
147  FAS_ASSERT(pSpiInterface != NULL_PTR);
148  uc_msg_t message = {0}; /* Message for read command */
149 
150  /** The function gets the device address
151  * The N775_CommunicationComposeMessage function adds the chain address.
152  * Chain address = 1 used so (deviceAddress | (1u << 6u)) is used
153  */
155  BMS1_CMD_WRITE, 0, (deviceAddress | (1u << 6u)), registerAddress, 0, &value, &message);
157 
158  /*
159  * Used to clear a pending Tx notification made by the read function
160  * when writing to registers: when reading, commands are sent on SPI1.
161  * In the SPI1 ISR, a notification is made, but it is not used: the system
162  * waits for the SPI Rx notification from SPI4. As a consequence, when the
163  * write function is called after the read function, there is already a
164  * notification pending. The function waiting for the notification in the
165  * ISR of SPI1 exits immediately instead of waiting for the end of the
166  * transmission.
167  */
169 
171 
172  uint32_t notificationTx = N775_WaitForTxCompletedNotification();
173  if (notificationTx != N775_TX_NOTIFIED_VALUE) {
174  /* Tx DMA interrupt has not come, release Tx SPI interface */
175  const uint8_t spiIndex = SPI_GetSpiIndex(spiREG1);
177  spi_busyFlags[spiIndex] = SPI_IDLE;
179  }
180 }
181 
183  uint16_t deviceAddress,
184  uint16_t registerAddress,
185  uint16_t *pValue,
186  N775_STATE_s *n775_state) {
187  FAS_ASSERT(pValue != NULL_PTR);
188  FAS_ASSERT(n775_state != NULL_PTR);
189  FAS_ASSERT(n775_state->pSpiTxSequence != NULL_PTR);
190  FAS_ASSERT(n775_state->pSpiRxSequence != NULL_PTR);
191  return N775_CommunicationReadMultiple(deviceAddress, 1, 1, registerAddress, pValue, n775_state);
192 }
193 
195  uint16_t deviceAddress,
196  uint16_t numberOfItems,
197  uint16_t responseLength,
198  uint16_t registerAddress,
199  uint16_t *pValues,
200  N775_STATE_s *n775_state) {
201  FAS_ASSERT(pValues != NULL_PTR);
202  FAS_ASSERT(n775_state != NULL_PTR);
203  FAS_ASSERT(n775_state->pSpiTxSequence != NULL_PTR);
204  FAS_ASSERT(n775_state->pSpiRxSequence != NULL_PTR);
205 
206  /* Number of registers to read */
207  uint16_t itemsReadRemaining = numberOfItems;
208  uint16_t *pReadValues = pValues;
209 
210  /**
211  * numberOfItems = 0 --> corresponds to one frame
212  * (max_frames - 1): because first frame is for the mirroring of Tx
213  * So (numberOfItems - 1u) is used in the following
214  */
215 
216  /** The function gets the device address
217  * The pack_msg function adds the chain address.
218  * Chain address = 1 used so (deviceAddress | (1u << 6u)) is used in the following
219  * */
220  /* responseLength = 0 means one data word per answer frame so (responseLength - 1u) is used in the following */
221 
222  uc_msg_t txMessage = {0u}; /* Message for read command */
223  uc_msg_t rxMessage = {0u}; /* Message for response */
224 
225  N775_COMMUNICATION_STATUS_e communicationStatus; /* Reception return code */
226  uint16_t read_parameter; /* Read parameter (padding_en, responseLength, num_regs) */
227 
228  uint16_t rsp_cmd; /* Response parts */
229  uint16_t rsp_mst_addr;
230  uint16_t rsp_dev_addr;
231  uint16_t rsp_reg_addr;
232  uint16_t rsp_length;
233  uint16_t rsp_values[4];
234 
235  read_parameter = ((uint16_t)1u << 10u) + /* Use padding */
236  ((responseLength - 1u) << 8u) + /* responseLength */
237  ((numberOfItems - 1u) << 0u); /* (numberOfItems-1u) register to read */
238 
240  BMS1_CMD_READ, 0, (deviceAddress | (1u << 6u)), registerAddress, 0, &read_parameter, &txMessage);
242 
243  /**
244  * After transmission to daisy-chain, daisy-chain will normally answer
245  * Already prepare SPI slave for reception
246  */
247 
248  /**
249  * Compute the number of answer frames needed by the MC33775A.
250  * Padding is used: always same number of registers in each answer frame
251  * (1,2,3 or 4 registers).
252  */
253  uint16_t nrAnswerFrames = (((numberOfItems - 1u) + 1u) / ((responseLength - 1u) + 1u));
254  /**
255  * Additional answer frame if number of registers to read and
256  * number of registers per answer frame are not multiples
257  * Example: 22 registers to read, 4 registers per answer frame.
258  * Answer: (5*4 register) + (2 registers + 2 words padded with 0)
259  */
260  if ((((numberOfItems - 1u) + 1u) % ((responseLength - 1u) + 1u)) != 0u) {
261  nrAnswerFrames++;
262  }
263  /**
264  * N775_WRITE_SPI_BUFFER_SIZE (4u): because of Tx mirroring, the command is received, too
265  * N775_READ_HEADER_SPI_BUFFER_SIZE + (responseLength - 1u) + 1u: size of one answer frame
266  * (responseLength - 1u) 0 --> 1 register --> (responseLength - 1u) +1u = 1
267  * (responseLength - 1u) 1 --> 2 registers --> (responseLength - 1u) +1u = 2
268  * (responseLength - 1u) 2 --> 3 registers --> (responseLength - 1u) +1u = 3
269  * (responseLength - 1u) 3 --> 4 registers --> (responseLength - 1u) +1u = 4
270  * */
271  uint16_t rxBufferLength = N775_WRITE_SPI_BUFFER_SIZE +
272  ((N775_READ_HEADER_SPI_BUFFER_SIZE + (responseLength - 1u) + 1u) * nrAnswerFrames);
273  FAS_ASSERT(
274  rxBufferLength <=
278 
279  /* send message */
281  bool n775_rxCompleted = true;
282 
283  uint32_t notificationRx = N775_WaitForRxCompletedNotification();
284  if (notificationRx != N775_RX_NOTIFIED_VALUE) {
285  n775_rxCompleted = false;
286  /* Rx has not come, release Tx SPI interface */
287  const uint8_t spiIndex = SPI_GetSpiIndex(spiREG1);
289  spi_busyFlags[spiIndex] = SPI_IDLE;
291  }
292 
293  if (n775_rxCompleted == false) {
294  n775_state->pSpiRxSequence->pNode->INT0 &= ~DMAREQEN_BIT;
295  n775_state->pSpiRxSequence->pNode->GCR1 &= ~SPIEN_BIT;
296  communicationStatus = N775_COMMUNICATION_ERROR_TIMEOUT;
297  } else {
298  for (uint16_t i = 0; i < nrAnswerFrames; i++) {
299  /* Currently only support for 64 bit communication */
300  rxMessage.message_length = 4u + (responseLength - 1u);
301  /* +4u: because of Tx mirroring, the command is received, too */
302 
303  rxMessage.head = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 0u];
304  rxMessage.data.dhead = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 1u];
305  rxMessage.data.data[0u] = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 2u];
306  if (rxMessage.message_length <= 4u) {
307  rxMessage.crc = n775FromTplRxBuffer[4u + (i * 4u) + 3u];
308  } else {
309  if (rxMessage.message_length == 5u) {
310  rxMessage.data.data[1u] = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 3u];
311  rxMessage.crc = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 4u];
312  } else {
313  if (rxMessage.message_length == 6u) {
314  rxMessage.data.data[1u] = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 3u];
315  rxMessage.data.data[2u] = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 4u];
316  rxMessage.crc = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 5u];
317  } else {
318  rxMessage.data.data[1u] = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 3u];
319  rxMessage.data.data[2u] = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 4u];
320  rxMessage.data.data[3u] = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 5u];
321  rxMessage.crc = n775FromTplRxBuffer[4u + (i * (4u + (responseLength - 1u))) + 6u];
322  }
323  }
324  }
325 
326  communicationStatus = N775_CommunicationDecomposeMessage(
327  &rxMessage,
328  &rsp_cmd,
329  &rsp_mst_addr,
330  &rsp_dev_addr,
331  &rsp_reg_addr,
332  &rsp_length,
333  rsp_values,
334  n775_state->currentString);
335 
336  if (communicationStatus == N775_COMMUNICATION_OK) {
337  /* SM.e.30 : Communication - Unique ID */
338  if (rsp_dev_addr == (deviceAddress | (1u << 6u))) {
339  if (rsp_reg_addr == (registerAddress + (i * ((responseLength - 1u) + 1u)))) {
340  for (uint16_t j = 0u; j < (rsp_length + 1u); j++) {
341  /* To take padded answer frames into account
342  * Stop before reaching the words padded with 0s
343  */
344  if (itemsReadRemaining > 0u) {
345  *pReadValues = rsp_values[j];
346  pReadValues++;
347  itemsReadRemaining--;
348  } else {
349  break;
350  }
351  }
352  } else {
354  }
355  } else {
357  }
358  }
359  }
360  }
361 
362  return communicationStatus;
363 }
364 
365 /* Reset the message counter for one device */
366 extern void N775_ResetMessageCounter(uint16_t deviceAddress, uint8_t string) {
367  /* Chain address = 1 used so (deviceAddress | (1u << 6u)) is used */
368  referenceMessageCounter[string][deviceAddress | (1u << 6u)] = 0u;
369 }
370 
371 /* Low level communication functions */
372 /* Pack message */
374  uint16_t cmd,
375  uint16_t masterAddress,
376  uint16_t deviceAddress,
377  uint16_t registerAddress,
378  uint16_t length,
379  uint16_t *pValue,
380  uc_msg_t *pMessage) {
381  FAS_ASSERT(pValue != NULL_PTR);
382  FAS_ASSERT(pMessage != NULL_PTR);
383  /* Create message */
384  set_cmd(pMessage, cmd);
385  set_madd(pMessage, masterAddress);
386  set_cadd(pMessage, deviceAddress >> 6u);
387  set_devadd(pMessage, deviceAddress & 0x3Fu);
388  set_msgcnt(pMessage, 0); /* not used by MCU, therefore fixed 0 */
389  set_datalen(pMessage, length);
390  set_regadd(pMessage, registerAddress);
391  for (uint16_t i = 0; i <= length; i++) {
392  set_data(pMessage, pValue[i], i);
393  }
394  set_message_length(pMessage, length + 4u);
395 
396  /* Create CRC */
397  set_crc(pMessage, calc_crc(pMessage));
398 }
399 
400 /* Unpack a message */
402  uc_msg_t *pMessage,
403  uint16_t *pCommand,
404  uint16_t *pMasterAddress,
405  uint16_t *pDeviceAddress,
406  uint16_t *pRegisterAddress,
407  uint16_t *pLength,
408  uint16_t *pValue,
409  uint8_t string) {
410  FAS_ASSERT(pMessage != NULL_PTR);
411  FAS_ASSERT(pCommand != NULL_PTR);
412  FAS_ASSERT(pMasterAddress != NULL_PTR);
413  FAS_ASSERT(pDeviceAddress != NULL_PTR);
414  FAS_ASSERT(pRegisterAddress != NULL_PTR);
415  FAS_ASSERT(pLength != NULL_PTR);
416  FAS_ASSERT(pValue != NULL_PTR);
417  uint16_t messageLength; /* length of received message */
418  uint16_t messageCount; /* message count from message */
419  uint16_t chainAddress; /* chain address */
420  uint16_t deviceAddressInChain; /* device address in the chain */
421 
422  bool errorCodeMatch = false;
424 
425  /* check if we have any content */
426  /* SM.e.28 : Communication - Timeout monitoring */
427  get_message_length(pMessage, &messageLength);
428  if (messageLength == 0u) {
429  errorCodeMatch = true;
430  communicationStatus = N775_COMMUNICATION_ERROR_TIMEOUT;
431  }
432 
433  if ((errorCodeMatch == false) && (messageLength < 4u)) {
434  errorCodeMatch = true;
435  communicationStatus = N775_COMMUNICATION_ERROR_SHORT_MESSAGE;
436  }
437 
438  /* Check CRC */
439  /* SM.e.27 : Communication - Information redundancy */
440  if ((errorCodeMatch == false) && (!check_crc(pMessage, calc_crc(pMessage)))) {
441  errorCodeMatch = true;
442  uint16_t receivedCrc;
443  get_crc(pMessage, &receivedCrc);
444  communicationStatus = N775_COMMUNICATION_ERROR_WRONG_CRC;
445  }
446 
447  /* Extract message parts */
448  get_cmd(pMessage, pCommand);
449  get_madd(pMessage, pMasterAddress);
450  get_cadd(pMessage, &chainAddress);
451  get_devadd(pMessage, &deviceAddressInChain);
452  *pDeviceAddress = (chainAddress << 6u) | deviceAddressInChain;
453  get_msgcnt(pMessage, &messageCount);
454  get_datalen(pMessage, pLength);
455  get_regadd(pMessage, pRegisterAddress);
456 
457  /* Check message counter */
458  /* SM.e.29 : Communication - Message counter */
459  if ((errorCodeMatch == false) && (messageCount != referenceMessageCounter[string][*pDeviceAddress])) {
460  errorCodeMatch = true;
461  referenceMessageCounter[string][*pDeviceAddress] = (messageCount + 1u) & 0xFu;
462  communicationStatus = N775_COMMUNICATION_ERROR_WRONG_MESSAGE_COUNT;
463  }
464  /* Increment message counter */
465  referenceMessageCounter[string][*pDeviceAddress] = (referenceMessageCounter[string][*pDeviceAddress] + 1u) & 0xFu;
466 
467  /* Check error address */
468  if ((errorCodeMatch == false) && (*pRegisterAddress == N775_ERROR_REGISTER_ADDRESS)) {
469  communicationStatus = N775_COMMUNICATION_ERROR_NO_ACCESS;
470  }
471 
472  /* return data */
473  if (errorCodeMatch == false) {
474  for (int i = 0u; i <= *pLength; i++) {
475  get_data(pMessage, &pValue[i], i);
476  }
477  if (*pCommand != BMS1_CMD_RESP) { /* Check for response */
478  communicationStatus = N775_COMMUNICATION_ERROR_NO_RESPONSE;
479  }
480  }
481 
482  /* TODO: check for N775_COMMUNICATION_ERROR_NOT_MATCHING_DEVICE_ADDRESS */
483  /* TODO: check for N775_COMMUNICATION_ERROR_NOT_MATCHING_REGISTER_ADDRESS */
484 
485  return communicationStatus;
486 }
487 
488 /*========== Externalized Static Function Implementations (Unit Test) =======*/
489 #ifdef UNITY_UNIT_TEST
490 #endif
#define BS_NR_OF_STRINGS
Number of parallel strings in the battery pack.
Headers for the driver for the DMA module.
#define SPIEN_BIT
Definition: dma_cfg.h:119
#define DMAREQEN_BIT
Definition: dma_cfg.h:117
Assert macro implementation.
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
Definition: fassert.h:254
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:77
Header for the driver for the IO module.
Headers for the driver for the MCU module.
#define N775_READ_HEADER_SPI_BUFFER_SIZE
N775_COMMUNICATION_STATUS_e N775_CommunicationReadMultiple(uint16_t deviceAddress, uint16_t numberOfItems, uint16_t responseLength, uint16_t registerAddress, uint16_t *pValues, N775_STATE_s *n775_state)
Read multiple values from specific registers in a specific device.
N775_COMMUNICATION_STATUS_e N775_CommunicationDecomposeMessage(uc_msg_t *pMessage, uint16_t *pCommand, uint16_t *pMasterAddress, uint16_t *pDeviceAddress, uint16_t *pRegisterAddress, uint16_t *pLength, uint16_t *pValue, uint8_t string)
Decomposes and analysis a message.
static uint32_t N775_WaitForTxCompletedNotification(void)
Wait for the SPI transmit communication to complete, using notifications.
static uint16_t n775FromTplRxBuffer[N775_WRITE_SPI_BUFFER_SIZE+((N775_READ_HEADER_SPI_BUFFER_SIZE+N775_READ_PAYLOAD_SPI_BUFFER_SIZE) *N775_MAX_ANSWER_FRAMES)]
static uint16_t referenceMessageCounter[BS_NR_OF_STRINGS][512]
static uint16_t n775ToTplTxBuffer[N775_WRITE_SPI_BUFFER_SIZE]
static uint16_t n775ToTplRxBuffer[N775_WRITE_SPI_BUFFER_SIZE]
#define N775_READ_PAYLOAD_SPI_BUFFER_SIZE
static uint32_t N775_WaitForRxCompletedNotification(void)
Wait for the SPI receive communication to complete, using notifications.
void N775_ResetMessageCounter(uint16_t deviceAddress, uint8_t string)
Reset the message counter for one or all devices.
static void N775_ConvertMessageToBuffer(uint16_t *pBuffer, uc_msg_t message)
Copies a message to the buffer to be passed to the SPI transmit functions.
void N775_CommunicationWrite(uint16_t deviceAddress, uint16_t registerAddress, uint16_t value, SPI_INTERFACE_CONFIG_s *pSpiInterface)
Write a value into a specific register in a specific device.
#define N775_WRITE_SPI_BUFFER_SIZE
static uint16_t n775FromTplTxBuffer[N775_WRITE_SPI_BUFFER_SIZE+((N775_READ_HEADER_SPI_BUFFER_SIZE+N775_READ_PAYLOAD_SPI_BUFFER_SIZE) *N775_MAX_ANSWER_FRAMES)]
#define N775_MAX_ANSWER_FRAMES
N775_COMMUNICATION_STATUS_e N775_CommunicationRead(uint16_t deviceAddress, uint16_t registerAddress, uint16_t *pValue, N775_STATE_s *n775_state)
Read a value from a specific register in a specific device.
void N775_CommunicationComposeMessage(uint16_t cmd, uint16_t masterAddress, uint16_t deviceAddress, uint16_t registerAddress, uint16_t length, uint16_t *pValue, uc_msg_t *pMessage)
Composes a message.
enum N775_COMMUNICATION_STATUS N775_COMMUNICATION_STATUS_e
@ N775_COMMUNICATION_ERROR_NOT_MATCHING_REGISTER_ADDRESS
@ N775_COMMUNICATION_ERROR_NO_ACCESS
@ N775_COMMUNICATION_ERROR_WRONG_MESSAGE_COUNT
@ N775_COMMUNICATION_OK
@ N775_COMMUNICATION_ERROR_WRONG_CRC
@ N775_COMMUNICATION_ERROR_TIMEOUT
@ N775_COMMUNICATION_ERROR_SHORT_MESSAGE
@ N775_COMMUNICATION_ERROR_NO_RESPONSE
@ N775_COMMUNICATION_ERROR_NOT_MATCHING_DEVICE_ADDRESS
#define N775_ERROR_REGISTER_ADDRESS
#define N775_NOTIFICATION_RX_TIMEOUT_ms
#define N775_NOTIFICATION_TX_TIMEOUT_ms
#define N775_NO_NOTIFIED_VALUE
#define N775_RX_NOTIFIED_VALUE
#define N775_NOTIFICATION_RX_INDEX
#define N775_NOTIFICATION_TX_INDEX
#define N775_TX_NOTIFIED_VALUE
Declaration of the OS wrapper interface.
OS_STD_RETURN_e OS_ClearNotificationIndexed(uint32_t indexToClear)
Clear pending notification of a task, with index.
Definition: os_freertos.c:235
OS_STD_RETURN_e OS_WaitForNotificationIndexed(uint32_t indexToWaitOn, uint32_t *pNotifiedValue, uint32_t timeout)
Wait for a notification, with index.
Definition: os_freertos.c:194
void OS_ExitTaskCritical(void)
Exit Critical interface function for use in FreeRTOS-Tasks and FreeRTOS-ISR.
Definition: os_freertos.c:138
void OS_EnterTaskCritical(void)
Enter Critical interface function for use in FreeRTOS-Tasks and FreeRTOS-ISR.
Definition: os_freertos.c:134
STD_RETURN_TYPE_e SPI_TransmitReceiveDataDma(SPI_INTERFACE_CONFIG_s *pSpiInterface, uint16_t *pTxBuff, uint16_t *pRxBuff, uint32_t frameLength)
Transmits and receives data on SPI with DMA.
Definition: spi.c:291
STD_RETURN_TYPE_e SPI_SlaveSetReceiveDataDma(SPI_INTERFACE_CONFIG_s *pSpiInterface, uint16_t *pTxBuff, uint16_t *pRxBuff, uint32_t frameLength)
Transmits and receives data on SPI with DMA.
Definition: spi.c:462
uint8_t SPI_GetSpiIndex(spiBASE_t *pNode)
Returns index of SPI node.
Definition: spi.c:555
Headers for the driver for the SPI module.
SPI_BUSY_STATE_e spi_busyFlags[]
Definition: spi_cfg.c:240
Headers for the configuration for the SPI module.
@ SPI_IDLE
Definition: spi_cfg.h:110
SPI_INTERFACE_CONFIG_s * pSpiTxSequence
SPI_INTERFACE_CONFIG_s * pSpiRxSequence
spiBASE_t * pNode
Definition: spi_cfg.h:127