foxBMS  1.4.1
The foxBMS Battery Management System API Documentation
crc.c
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41 
42 /**
43  * @file crc.c
44  * @author foxBMS Team
45  * @date 2022-02-22 (date of creation)
46  * @updated 2022-10-27 (date of last update)
47  * @version v1.4.1
48  * @ingroup DRIVERS
49  * @prefix CRC
50  *
51  * @brief crc module implementation
52  *
53  * @details Uses the system CRC hardware for data integrity calculation
54  */
55 
56 /*========== Includes =======================================================*/
57 #include "crc.h"
58 
59 /*========== Macros and Definitions =========================================*/
60 
61 /*========== Static Constant and Variable Definitions =======================*/
62 
63 /*========== Extern Constant and Variable Definitions =======================*/
64 
65 /*========== Static Function Prototypes =====================================*/
66 
67 /*========== Static Function Implementations ================================*/
68 
69 /*========== Extern Function Implementations ================================*/
70 
71 extern STD_RETURN_TYPE_e CRC_CalculateCrc(uint64_t *pCrc, uint8_t *pData, uint32_t lengthInBytes) {
72  static uint16_t crcCalls = 0u;
74  uint32_t dataBufferLow = 0u;
75  uint32_t dataBufferHigh = 0u;
76  uint32_t remainingBytes = lengthInBytes;
77  uint32_t remainingData = 0u;
78  STD_RETURN_TYPE_e retVal = STD_OK;
79 
80  FAS_ASSERT(pCrc != NULL_PTR);
81  FAS_ASSERT(pData != NULL_PTR);
82 
83  uint8_t *pRead = pData;
84 
85  if (crcCalls == 0u) {
86  crcCalls++;
87 
88  /* Set mode to Data Capture Mode, otherwise writing the seed
89  starts the computation */
90  crcREG1->CTRL2 &= CRC_DATA_CAPTURE_MODE_CLEAR_MASK;
91  /* Set seed*/
92  crcREG1->PSA_SIGREGH1 = CRC_SEED_HIGH;
93  crcREG1->PSA_SIGREGL1 = CRC_SEED_LOW;
94  /* Set mode to Full-CPU Mode to start the computation when writing the data*/
95  crcREG1->CTRL2 |= CRC_FULL_CPU_MODE_SET_MASK;
96 
97  /* AXIVION Next Codeline Style MisraC2012-11.3: 64 bit access needed, partial 32 bit access starts computation */
98  /* Pointer to access the two signature registers, where input data will be written */
99  volatile uint64_t *pCrcRegister = (volatile uint64 *)(&crcREG1->PSA_SIGREGL1);
100 
101  /* Treat packets of 64 bit data */
102  while (remainingBytes >= CRC_REGISTER_SIZE_IN_BYTES) {
103  /* Invert two 32 bit chunks before 64 bit write, due to big endian */
104  if (registerSide == CRC_REGISTER_LOW) {
105  dataBufferLow = 0u;
106  for (uint8_t i = 0u; i < CRC_REGISTER_SIZE_IN_BYTES; i++) {
107  uint8_t dataBuffer = *(pRead + i);
108  dataBufferLow |= ((uint32_t)dataBuffer) << ((CRC_REVERSE_BYTES_ORDER - i) * CRC_BYTE_SIZE_IN_BITS);
109  }
110  registerSide = CRC_REGISTER_HIGH;
111  } else { /* registerSide is CRC_REGISTER_HIGH */
112  dataBufferHigh = 0u;
113  for (uint8_t i = 0u; i < CRC_REGISTER_SIZE_IN_BYTES; i++) {
114  uint8_t dataBuffer = *(pRead + i);
115  dataBufferHigh |= ((uint32_t)dataBuffer) << ((CRC_REVERSE_BYTES_ORDER - i) * CRC_BYTE_SIZE_IN_BITS);
116  }
117  /* Signature low and high available, write to hardware register */
118  uint64_t crcData = (((uint64_t)dataBufferHigh) << CRC_REGISTER_SIZE_IN_BITS) | dataBufferLow;
119  *pCrcRegister = crcData;
120  registerSide = CRC_REGISTER_LOW;
121  }
122  pRead = (pRead + CRC_REGISTER_SIZE_IN_BYTES);
123  remainingBytes -= CRC_REGISTER_SIZE_IN_BYTES;
124  }
125 
126  if (remainingBytes > 0u) {
127  /* Now treat last packet that is less than 32 bits if existing */
128  /* Get data in a 32 bit variable, pad with 0 */
129  while (remainingBytes > 0u) {
130  uint8_t dataBuffer = *pRead;
131  remainingData |= ((uint32_t)(dataBuffer)) << (CRC_BYTE_SIZE_IN_BITS * remainingBytes);
132  pRead++;
133  remainingBytes--;
134  }
135  if (registerSide == CRC_REGISTER_LOW) {
136  dataBufferLow = remainingData;
137  registerSide = CRC_REGISTER_HIGH;
138  } else { /* registerSide is CRC_REGISTER_HIGH */
139  dataBufferHigh = remainingData;
140  /* Signature low and high available, write to hardware register */
141  uint64_t crcData = (((uint64_t)dataBufferHigh) << CRC_REGISTER_SIZE_IN_BITS) | dataBufferLow;
142  *pCrcRegister = crcData;
143  registerSide = CRC_REGISTER_LOW;
144  }
145  }
146 
147  /* No data remaining but only low register data available: compute CRC */
148  if (registerSide == CRC_REGISTER_HIGH) {
149  crcREG1->PSA_SIGREGL1 = dataBufferLow;
150  }
151 
152  *pCrc = crcREG1->PSA_SIGREGL1;
153  *pCrc |= ((uint64_t)crcREG1->PSA_SIGREGH1) << CRC_REGISTER_SIZE_IN_BITS;
154  crcCalls--;
155  } else {
156  *pCrc = 0u;
157  retVal = STD_NOT_OK;
158  }
159 
160  return retVal;
161 }
162 /*================== Static functions ======================================*/
163 
164 /*========== Externalized Static Function Implementations (Unit Test) =======*/
STD_RETURN_TYPE_e CRC_CalculateCrc(uint64_t *pCrc, uint8_t *pData, uint32_t lengthInBytes)
Computes CRC of data flow.
Definition: crc.c:71
crc module header
#define CRC_DATA_CAPTURE_MODE_CLEAR_MASK
Definition: crc.h:71
#define CRC_REGISTER_SIZE_IN_BYTES
Definition: crc.h:78
#define CRC_BYTE_SIZE_IN_BITS
Definition: crc.h:76
#define CRC_SEED_HIGH
Definition: crc.h:67
CRC_REGISTER_SIDE_e
Definition: crc.h:89
@ CRC_REGISTER_HIGH
Definition: crc.h:91
@ CRC_REGISTER_LOW
Definition: crc.h:90
#define CRC_SEED_LOW
Definition: crc.h:69
#define CRC_REVERSE_BYTES_ORDER
Definition: crc.h:82
#define CRC_FULL_CPU_MODE_SET_MASK
Definition: crc.h:73
#define CRC_REGISTER_SIZE_IN_BITS
Definition: crc.h:80
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
Definition: fassert.h:252
STD_RETURN_TYPE_e
Definition: fstd_types.h:81
@ STD_NOT_OK
Definition: fstd_types.h:83
@ STD_OK
Definition: fstd_types.h:82
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:76