foxBMS  1.1.2
The foxBMS Battery Management System API Documentation
spi_cfg.c
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41 
42 /**
43  * @file spi_cfg.c
44  * @author foxBMS Team
45  * @date 2020-03-05 (date of creation)
46  * @updated 2021-06-16 (date of last update)
47  * @ingroup DRIVERS_CONFIGURATION
48  * @prefix SPI
49  *
50  * @brief Configuration for the SPI module
51  *
52  *
53  *
54  */
55 
56 /*========== Includes =======================================================*/
57 #include "spi_cfg.h"
58 
59 /*========== Macros and Definitions =========================================*/
60 
61 /*========== Static Constant and Variable Definitions =======================*/
62 
63 /** SPI data configuration struct for LTC communication */
64 static const spiDAT1_t spi_kLtcDataConfig = {
65  /* struct is implemented in the TI HAL and uses uppercase true and false */
66  .CS_HOLD = FALSE, /* The HW chip select signal is deactivated */
67  .WDEL = TRUE, /* No delay will be inserted */
68  .DFSEL = SPI_FMT_0, /* Data word format select: Data format 0 (SPI1) */
69  .CSNR = 0x0, /* Chip select (CS) number, 0x01h for CS[0] */
70 };
71 
72 /*========== Extern Constant and Variable Definitions =======================*/
73 /**
74  * SPI interface configuration for LTC communication
75  * This is a list of structs because of multistring
76  */
78  {
80  .pConfig = &spi_kLtcDataConfig,
81  .pNode = spiREG1,
82  .pGioPort = &(spiREG1->PC3),
83  .csPin = 2u,
84  },
85  {
86  .channel = SPI_Interface1,
87  .pConfig = &spi_kLtcDataConfig,
88  .pNode = spiREG1,
89  .pGioPort = &(spiREG1->PC3),
90  .csPin = 2u,
91  },
92  {
93  .channel = SPI_Interface1,
94  .pConfig = &spi_kLtcDataConfig,
95  .pNode = spiREG1,
96  .pGioPort = &(spiREG1->PC3),
97  .csPin = 2u,
98  },
99 };
100 
101 /** SPI data configuration struct for MXM communication */
102 static const spiDAT1_t spi_kMxmDataConfig = {
103  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
104  .WDEL = TRUE, /*!< No delay will be inserted */
105  .DFSEL = SPI_FMT_1, /*!< Data word format select: Data format 1 (SPI1) */
106  .CSNR = 0x00, /*!< Chip select (CS) number, 0x01h for CS[0] */
107 };
108 
109 /** SPI interface configuration for MXM communication */
112  .pConfig = &spi_kMxmDataConfig,
113  .pNode = spiREG4,
114  .pGioPort = &(spiREG4->PC3),
115  .csPin = 0u,
116 };
117 
118 /** SPI data configuration struct for NXP MC33775A communication */
119 const spiDAT1_t spi_kNxp775DataConfig = {
120  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
121  .WDEL = TRUE, /*!< No delay will be inserted */
122  .DFSEL = SPI_FMT_0, /*!< Data word format select */
123  .CSNR = 0x0, /*!< Chip select (CS) number, 0x01h for CS[0] */
124 };
125 
126 /** SPI interface configuration for N775 communication */
129  .pConfig = &spi_kNxp775DataConfig,
130  .pNode = spiREG1,
131  .pGioPort = &(spiREG1->PC3),
132  .csPin = 2u,
133 };
134 
135 /** SPI data configuration struct for FRAM communication */
136 static const spiDAT1_t spi_kFramDataConfig = {
137  /* struct is implemented in the TI HAL and uses uppercase true and false */
138  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
139  .WDEL = TRUE, /*!< No delay will be inserted */
140  .DFSEL = SPI_FMT_1, /*!< Data word format select: data format 1 (SPI3) */
141  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
142 };
143 
144 /** SPI interface configuration for FRAM communication */
147  .pConfig = &spi_kFramDataConfig,
148  .pNode = spiREG3,
149  .pGioPort = &(spiREG3->PC3),
150  .csPin = 0u,
151 };
152 
153 /** SPI data configuration struct for SPS communication in low speed (4MHz) */
154 static const spiDAT1_t spi_kSpsDataConfigLowSpeed = {
155  /* struct is implemented in the TI HAL and uses uppercase true and false */
156  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
157  .WDEL = TRUE, /*!< No delay will be inserted */
158  .DFSEL = SPI_FMT_1, /*!< Data word format select: data format 1 (SPI2) */
159  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
160 };
161 
162 /** SPI data configuration struct for SPS communication in high speed (10MHz) */
163 static const spiDAT1_t spi_kSpsDataConfigHighSpeed = {
164  /* struct is implemented in the TI HAL and uses uppercase true and false */
165  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
166  .WDEL = TRUE, /*!< No delay will be inserted */
167  .DFSEL = SPI_FMT_2, /*!< Data word format select: data format 1 (SPI2) */
168  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
169 };
170 
171 /** SPI interface configuration for SPS communication */
174  .pConfig = &spi_kSpsDataConfigLowSpeed,
175  .pNode = spiREG2,
176  .pGioPort = &SPS_SPI_CS_GIOPORT,
177  .csPin = SPS_SPI_CS_PIN,
178 };
179 
180 /** SPI data configuration struct for ADC communication */
181 static const spiDAT1_t spi_kAdcDataConfig = {
182  /* struct is implemented in the TI HAL and uses uppercase true and false */
183  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
184  .WDEL = TRUE, /*!< No delay will be inserted */
185  .DFSEL = SPI_FMT_2, /*!< Data word format select: data format 2 (SPI3) */
186  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
187 };
188 
189 /** SPI interface configuration for ADC communication */
192  .pConfig = &spi_kAdcDataConfig,
193  .pNode = spiREG3,
194  .pGioPort = &(spiREG3->PC3),
195  .csPin = 4u,
196 };
197 
198 /** SPI interface configuration for ADC communication */
201  .pConfig = &spi_kAdcDataConfig,
202  .pNode = spiREG3,
203  .pGioPort = &(spiREG3->PC3),
204  .csPin = 5u,
205 };
206 
207 /** SPI configuration struct for SBC communication */
208 static const spiDAT1_t spi_kSbcDataConfig = {
209  /* struct is implemented in the TI HAL and uses uppercase true and false */
210  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
211  .WDEL = TRUE, /*!< No delay will be inserted */
212  .DFSEL = SPI_FMT_0, /*!< Data word format select */
213  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
214 };
215 
216 /** SPI interface configuration for SBC communication */
219  .pConfig = &spi_kSbcDataConfig,
220  .pNode = spiREG2,
221  .pGioPort = &(spiREG2->PC3),
222  .csPin = 0u,
223 };
224 
225 /**
226  * @brief Variable used for SPI over DMA transmission. Retains the CS pin to
227  * deactivate in DMA callback
228  */
230  {
232  .pConfig = &spi_kLtcDataConfig,
233  .pNode = spiREG1,
234  .pGioPort = &(spiREG1->PC3),
235  .csPin = 2u,
236  },
237  {
238  .channel = SPI_Interface1,
239  .pConfig = &spi_kLtcDataConfig,
240  .pNode = spiREG1,
241  .pGioPort = &(spiREG1->PC3),
242  .csPin = 2u,
243  },
244  {
245  .channel = SPI_Interface1,
246  .pConfig = &spi_kLtcDataConfig,
247  .pNode = spiREG1,
248  .pGioPort = &(spiREG1->PC3),
249  .csPin = 2u,
250  },
251  {
252  .channel = SPI_Interface1,
253  .pConfig = &spi_kLtcDataConfig,
254  .pNode = spiREG1,
255  .pGioPort = &(spiREG1->PC3),
256  .csPin = 2u,
257  },
258  {
259  .channel = SPI_Interface1,
260  .pConfig = &spi_kLtcDataConfig,
261  .pNode = spiREG1,
262  .pGioPort = &(spiREG1->PC3),
263  .csPin = 2u,
264  },
265 };
266 
267 /**
268  * @details With DMA, only FMT0 can be used. This table stores the existing
269  * FMT0. The wanted FMT is then copied in FMT0. In the DMA callback,
270  * the existing FMT0 is restored with this table.
271  */
272 uint32_t spi_saveFmt0[] = {
273  0U,
274  0U,
275  0U,
276  0U,
277  0U,
278 };
279 
280 /** struct containing the lock state of the SPI interfaces */
282  SPI_IDLE,
283  SPI_IDLE,
284  SPI_IDLE,
285  SPI_IDLE,
286  SPI_IDLE,
287 };
288 
289 /** size of #spi_busyFlags */
290 const uint8_t spi_nrBusyFlags = sizeof(spi_busyFlags) / sizeof(SPI_BUSY_STATE_e);
291 
292 /*========== Static Function Prototypes =====================================*/
293 
294 /*========== Static Function Implementations ================================*/
295 
296 /*========== Extern Function Implementations ================================*/
298  FAS_ASSERT(pSpiSpsInterface != NULL_PTR);
299  pSpiSpsInterface->pConfig = &spi_kSpsDataConfigHighSpeed;
300 }
301 
303  FAS_ASSERT(pSpiSpsInterface != NULL_PTR);
304  pSpiSpsInterface->pConfig = &spi_kSpsDataConfigLowSpeed;
305 }
306 
307 /*========== Externalized Static Function Implementations (Unit Test) =======*/
#define BS_NR_OF_STRINGS
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
Definition: fassert.h:237
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:66
void SPI_SpsInterfaceSwitchToLowSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to low speed.
Definition: spi_cfg.c:302
SPI_INTERFACE_CONFIG_s spi_MxmInterface
Definition: spi_cfg.c:110
static const spiDAT1_t spi_kSpsDataConfigHighSpeed
Definition: spi_cfg.c:163
static const spiDAT1_t spi_kAdcDataConfig
Definition: spi_cfg.c:181
SPI_INTERFACE_CONFIG_s spi_dmaTransmission[]
Variable used for SPI over DMA transmission. Retains the CS pin to deactivate in DMA callback.
Definition: spi_cfg.c:229
SPI_INTERFACE_CONFIG_s spi_adc0Interface
Definition: spi_cfg.c:190
SPI_INTERFACE_CONFIG_s spi_kSbcMcuInterface
Definition: spi_cfg.c:217
static const spiDAT1_t spi_kLtcDataConfig
Definition: spi_cfg.c:64
static const spiDAT1_t spi_kSbcDataConfig
Definition: spi_cfg.c:208
const spiDAT1_t spi_kNxp775DataConfig
Definition: spi_cfg.c:119
SPI_BUSY_STATE_e spi_busyFlags[]
Definition: spi_cfg.c:281
static const spiDAT1_t spi_kMxmDataConfig
Definition: spi_cfg.c:102
SPI_INTERFACE_CONFIG_s spi_nxp775Interface
Definition: spi_cfg.c:127
static const spiDAT1_t spi_kFramDataConfig
Definition: spi_cfg.c:136
SPI_INTERFACE_CONFIG_s spi_framInterface
Definition: spi_cfg.c:145
uint32_t spi_saveFmt0[]
Definition: spi_cfg.c:272
SPI_INTERFACE_CONFIG_s spi_adc1Interface
Definition: spi_cfg.c:199
void SPI_SpsInterfaceSwitchToHighSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to high speed.
Definition: spi_cfg.c:297
static const spiDAT1_t spi_kSpsDataConfigLowSpeed
Definition: spi_cfg.c:154
SPI_INTERFACE_CONFIG_s spi_ltcInterface[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:77
const uint8_t spi_nrBusyFlags
Definition: spi_cfg.c:290
SPI_INTERFACE_CONFIG_s spi_spsInterface
Definition: spi_cfg.c:172
Headers for the configuration for the SPI module.
@ SPI_IDLE
Definition: spi_cfg.h:93
#define SPS_SPI_CS_PIN
Definition: spi_cfg.h:75
enum SPI_BUSY_STATE SPI_BUSY_STATE_e
#define SPS_SPI_CS_GIOPORT
Definition: spi_cfg.h:73
@ SPI_Interface3
Definition: spi_cfg.h:101
@ SPI_Interface2
Definition: spi_cfg.h:100
@ SPI_Interface4
Definition: spi_cfg.h:102
@ SPI_Interface1
Definition: spi_cfg.h:99
const spiDAT1_t * pConfig
Definition: spi_cfg.h:109
SPI_INTERFACE_e channel
Definition: spi_cfg.h:108