foxBMS  1.1.0
The foxBMS Battery Management System API Documentation
Data Structures | Macros | Typedefs | Enumerations | Variables
sps_cfg.h File Reference

Header for the configuration for the driver for the smart power switches. More...

#include "general.h"
#include "battery_system_cfg.h"
#include "sps_types.h"
Include dependency graph for sps_cfg.h:
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Go to the source code of this file.

Data Structures

struct  SPS_CHANNEL_STATE
 

Macros

#define SPS_NR_CONTACTOR_PER_IC   (4u)
 
#define SPS_NR_OF_IC   (3u)
 
#define SPS_NR_OF_REQUIRED_CONTACTOR_CHANNELS   (BS_NR_OF_CONTACTORS)
 
#define SPS_NR_OF_AVAILABLE_SPS_CHANNELS   (SPS_NR_CONTACTOR_PER_IC * SPS_NR_OF_IC)
 
#define SPS_SPI_BUFFERSIZE   SPS_NR_OF_IC
 
#define SPS_RW_BIT_POSITION   (15u)
 
#define SPS_RW_READ   (0u)
 
#define SPS_RW_WRITE   (1u)
 
#define SPS_ADDRESS_BIT_START   (8u)
 
#define SPS_DIAG_CTRL_BIT_POSITION   (7u)
 
#define SPS_NORMAL_MODE   (0x01u)
 
#define SPS_STRONG_DRIVE   (0x00u)
 
#define SPS_MEDIUM_DRIVE   (0x01u)
 
#define SPS_MODE_BIT_START   (6u)
 
#define SPS_DRIVE_STRENGTH_BIT_START   (5u)
 
#define SPS_I_MEASUREMENT_LSB_mA   (0.98f)
 
#define SPS_CHANNEL_ON_DEFAULT_THRESHOLD_mA   (20.0f)
 
#define SPS_BITMASK_DIAGNOSTIC_ONDEMAND_OUTPUT_CURRENT   (0x1FFFu)
 
#define SPS_RESET_GIOPORT   (hetREG2->DOUT)
 
#define SPS_RESET_GIOPORT_DIR   (hetREG2->DIR)
 
#define SPS_RESET_PIN   (16u)
 
#define SPS_GLOBAL_CONTROL_REGISTER_ADDRESS   (0x00u)
 
#define SPS_OUTPUT_CONTROL_REGISTER_ADDRESS   (0x02u)
 
#define SPS_C_CONTROL_REGISTER_ADDRESS   (0x16u)
 
#define SPS_OD_IOUT1_DIAG_REGISTER_ADDRESS   (0x08u)
 
#define SPS_OD_IOUT2_DIAG_REGISTER_ADDRESS   (0x09u)
 
#define SPS_OD_IOUT3_DIAG_REGISTER_ADDRESS   (0x0Au)
 
#define SPS_OD_IOUT4_DIAG_REGISTER_ADDRESS   (0x0Bu)
 
#define SPS_EN_IRQ_PIN_DIAG_REGISTER_ADDRESS   (0x11u)
 
#define SPS_EN_WARN_PIN_DIAG_REGISTER_ADDRESS   (0x13u)
 

Typedefs

typedef enum SPS_WRITE_TYPE SPS_WRITE_TYPE_e
 
typedef enum SPS_READ_TYPE SPS_READ_TYPE_e
 
typedef enum SPS_CHANNEL_FUNCTION SPS_CHANNEL_FUNCTION_e
 
typedef struct SPS_CHANNEL_STATE SPS_CHANNEL_STATE_s
 
typedef enum SPS_STATE SPS_STATE_e
 
typedef enum SPS_ACTION SPS_ACTION_e
 

Enumerations

enum  SPS_WRITE_TYPE { SPS_replaceCurrentValue , SPS_orWithCurrentValue , SPS_andWithCurrentValue }
 
enum  SPS_READ_TYPE { SPS_READ_DIAGNOSTIC_REGISTER , SPS_READ_CONTROL_REGISTER }
 
enum  SPS_CHANNEL_FUNCTION { SPS_CHANNEL_OFF , SPS_CHANNEL_ON }
 
enum  SPS_STATE {
  SPS_START , SPS_RESET_LOW , SPS_RESET_HIGH , SPS_CONFIGURE_CONTROL_REGISTER ,
  SPS_TRIGGER_CURRENT_MEASUREMENT , SPS_READ_MEASURED_CURRENT1 , SPS_READ_MEASURED_CURRENT2 , SPS_READ_MEASURED_CURRENT3 ,
  SPS_READ_MEASURED_CURRENT4 , SPS_READ_EN_IRQ_PIN
}
 
enum  SPS_ACTION {
  SPS_ACTION_CONFIGURE_CONTROL_REGISTER , SPS_ACTION_TRIGGER_CURRENT_MEASUREMENT , SPS_ACTION_READ_CURRENT_MEASUREMENT1 , SPS_ACTION_READ_CURRENT_MEASUREMENT2 ,
  SPS_ACTION_READ_CURRENT_MEASUREMENT3 , SPS_ACTION_READ_CURRENT_MEASUREMENT4 , SPS_ACTION_READ_EN_IRQ_PIN
}
 

Variables

SPS_CHANNEL_STATE_s sps_channelStatus [SPS_NR_OF_AVAILABLE_SPS_CHANNELS]
 

Detailed Description

Header for the configuration for the driver for the smart power switches.

Copyright
© 2010 - 2021, Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V. All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Author
foxBMS Team
Date
2020-10-14 (date of creation)
Updated
2020-10-14 (date of last update)
Prefix
SPS

Definition in file sps_cfg.h.

Macro Definition Documentation

◆ SPS_ADDRESS_BIT_START

#define SPS_ADDRESS_BIT_START   (8u)

In Tx SPI buffer, register address starts at bit 8

Definition at line 125 of file sps_cfg.h.

◆ SPS_BITMASK_DIAGNOSTIC_ONDEMAND_OUTPUT_CURRENT

#define SPS_BITMASK_DIAGNOSTIC_ONDEMAND_OUTPUT_CURRENT   (0x1FFFu)

bitmask for reading the on-demand output current from a SPI transaction

Definition at line 150 of file sps_cfg.h.

◆ SPS_C_CONTROL_REGISTER_ADDRESS

#define SPS_C_CONTROL_REGISTER_ADDRESS   (0x16u)

Addresses of used control registers

Definition at line 103 of file sps_cfg.h.

◆ SPS_CHANNEL_ON_DEFAULT_THRESHOLD_mA

#define SPS_CHANNEL_ON_DEFAULT_THRESHOLD_mA   (20.0f)

current threshold that recognizes a contactor as closed

Definition at line 147 of file sps_cfg.h.

◆ SPS_DIAG_CTRL_BIT_POSITION

#define SPS_DIAG_CTRL_BIT_POSITION   (7u)

This bit is set to 0 to read a diagnostic register, to 1 to read a control register

Definition at line 127 of file sps_cfg.h.

◆ SPS_DRIVE_STRENGTH_BIT_START

#define SPS_DRIVE_STRENGTH_BIT_START   (5u)

bitshift for the drive strength bit in the SPS

Definition at line 141 of file sps_cfg.h.

◆ SPS_EN_IRQ_PIN_DIAG_REGISTER_ADDRESS

#define SPS_EN_IRQ_PIN_DIAG_REGISTER_ADDRESS   (0x11u)

Addresses of used diagnostic registers

Definition at line 110 of file sps_cfg.h.

◆ SPS_EN_WARN_PIN_DIAG_REGISTER_ADDRESS

#define SPS_EN_WARN_PIN_DIAG_REGISTER_ADDRESS   (0x13u)

Addresses of used diagnostic registers

Definition at line 111 of file sps_cfg.h.

◆ SPS_GLOBAL_CONTROL_REGISTER_ADDRESS

#define SPS_GLOBAL_CONTROL_REGISTER_ADDRESS   (0x00u)

Addresses of used control registers

Definition at line 101 of file sps_cfg.h.

◆ SPS_I_MEASUREMENT_LSB_mA

#define SPS_I_MEASUREMENT_LSB_mA   (0.98f)

LSB of current measurement of SPS channel in mA

Definition at line 144 of file sps_cfg.h.

◆ SPS_MEDIUM_DRIVE

#define SPS_MEDIUM_DRIVE   (0x01u)

value for the SPS medium drive

Definition at line 134 of file sps_cfg.h.

◆ SPS_MODE_BIT_START

#define SPS_MODE_BIT_START   (6u)

bitshift for the mode bit in the SPS

used for bitshifting SPS_NORMAL_MODE to the right position

Definition at line 139 of file sps_cfg.h.

◆ SPS_NORMAL_MODE

#define SPS_NORMAL_MODE   (0x01u)

value for the SPS normal mode

Definition at line 130 of file sps_cfg.h.

◆ SPS_NR_CONTACTOR_PER_IC

#define SPS_NR_CONTACTOR_PER_IC   (4u)

Each SPS IC has four outputs

Definition at line 73 of file sps_cfg.h.

◆ SPS_NR_OF_AVAILABLE_SPS_CHANNELS

#define SPS_NR_OF_AVAILABLE_SPS_CHANNELS   (SPS_NR_CONTACTOR_PER_IC * SPS_NR_OF_IC)

Calculate the number of available SPS channels

Definition at line 82 of file sps_cfg.h.

◆ SPS_NR_OF_IC

#define SPS_NR_OF_IC   (3u)

Number of SPS IC that are populated on the hardware (in daisy-chain)

Definition at line 76 of file sps_cfg.h.

◆ SPS_NR_OF_REQUIRED_CONTACTOR_CHANNELS

#define SPS_NR_OF_REQUIRED_CONTACTOR_CHANNELS   (BS_NR_OF_CONTACTORS)

One channel for each contactor is required in this application

Definition at line 79 of file sps_cfg.h.

◆ SPS_OD_IOUT1_DIAG_REGISTER_ADDRESS

#define SPS_OD_IOUT1_DIAG_REGISTER_ADDRESS   (0x08u)

Addresses of used diagnostic registers

Definition at line 106 of file sps_cfg.h.

◆ SPS_OD_IOUT2_DIAG_REGISTER_ADDRESS

#define SPS_OD_IOUT2_DIAG_REGISTER_ADDRESS   (0x09u)

Addresses of used diagnostic registers

Definition at line 107 of file sps_cfg.h.

◆ SPS_OD_IOUT3_DIAG_REGISTER_ADDRESS

#define SPS_OD_IOUT3_DIAG_REGISTER_ADDRESS   (0x0Au)

Addresses of used diagnostic registers

Definition at line 108 of file sps_cfg.h.

◆ SPS_OD_IOUT4_DIAG_REGISTER_ADDRESS

#define SPS_OD_IOUT4_DIAG_REGISTER_ADDRESS   (0x0Bu)

Addresses of used diagnostic registers

Definition at line 109 of file sps_cfg.h.

◆ SPS_OUTPUT_CONTROL_REGISTER_ADDRESS

#define SPS_OUTPUT_CONTROL_REGISTER_ADDRESS   (0x02u)

Addresses of used control registers

Definition at line 102 of file sps_cfg.h.

◆ SPS_RESET_GIOPORT

#define SPS_RESET_GIOPORT   (hetREG2->DOUT)

GIO defines for pin to drive reset line of SPS

Definition at line 67 of file sps_cfg.h.

◆ SPS_RESET_GIOPORT_DIR

#define SPS_RESET_GIOPORT_DIR   (hetREG2->DIR)

GIO defines for pin to drive reset line of SPS

Definition at line 68 of file sps_cfg.h.

◆ SPS_RESET_PIN

#define SPS_RESET_PIN   (16u)

GIO defines for pin to drive reset line of SPS

Definition at line 69 of file sps_cfg.h.

◆ SPS_RW_BIT_POSITION

#define SPS_RW_BIT_POSITION   (15u)

These bits and positions are defined in figure 7 page 10 in datasheet Rev. 2 - 11 September 2019 This bit is set to 0 for a read register access, to 1 for a write register access

Definition at line 119 of file sps_cfg.h.

◆ SPS_RW_READ

#define SPS_RW_READ   (0u)

Define for read register access

Definition at line 121 of file sps_cfg.h.

◆ SPS_RW_WRITE

#define SPS_RW_WRITE   (1u)

Define for write register access

Definition at line 123 of file sps_cfg.h.

◆ SPS_SPI_BUFFERSIZE

#define SPS_SPI_BUFFERSIZE   SPS_NR_OF_IC

Defines the buffer size to communicate with the SPS IC.

One 16 bit word per SPS IC so buffer size is equivalent to the number of SPS ICs.

  • 1 SPS IC -> Buffer size = 1
  • 2 SPS IC -> Buffer size = 2
  • 3 SPS IC -> Buffer size = 3

Definition at line 98 of file sps_cfg.h.

◆ SPS_STRONG_DRIVE

#define SPS_STRONG_DRIVE   (0x00u)

value for the SPS strong drive

Definition at line 132 of file sps_cfg.h.

Typedef Documentation

◆ SPS_ACTION_e

typedef enum SPS_ACTION SPS_ACTION_e

Actions to do for the Smart Power Switch IC

◆ SPS_CHANNEL_FUNCTION_e

typedef enum SPS_CHANNEL_FUNCTION SPS_CHANNEL_FUNCTION_e

functional state of a SPS channel

◆ SPS_CHANNEL_STATE_s

typedef struct SPS_CHANNEL_STATE SPS_CHANNEL_STATE_s

SPS channel state

◆ SPS_READ_TYPE_e

typedef enum SPS_READ_TYPE SPS_READ_TYPE_e

sps read types

◆ SPS_STATE_e

typedef enum SPS_STATE SPS_STATE_e

State for the CONT handling

◆ SPS_WRITE_TYPE_e

typedef enum SPS_WRITE_TYPE SPS_WRITE_TYPE_e

spi block identification numbers

Enumeration Type Documentation

◆ SPS_ACTION

enum SPS_ACTION

Actions to do for the Smart Power Switch IC

Enumerator
SPS_ACTION_CONFIGURE_CONTROL_REGISTER 
SPS_ACTION_TRIGGER_CURRENT_MEASUREMENT 
SPS_ACTION_READ_CURRENT_MEASUREMENT1 
SPS_ACTION_READ_CURRENT_MEASUREMENT2 
SPS_ACTION_READ_CURRENT_MEASUREMENT3 
SPS_ACTION_READ_CURRENT_MEASUREMENT4 
SPS_ACTION_READ_EN_IRQ_PIN 

Definition at line 200 of file sps_cfg.h.

◆ SPS_CHANNEL_FUNCTION

enum SPS_CHANNEL_FUNCTION

functional state of a SPS channel

Enumerator
SPS_CHANNEL_OFF 

sps channel is switched off

SPS_CHANNEL_ON 

sps channel is switched on

Definition at line 166 of file sps_cfg.h.

◆ SPS_READ_TYPE

enum SPS_READ_TYPE

sps read types

Enumerator
SPS_READ_DIAGNOSTIC_REGISTER 

diagnostic register read

SPS_READ_CONTROL_REGISTER 

control register read

Definition at line 160 of file sps_cfg.h.

◆ SPS_STATE

enum SPS_STATE

State for the CONT handling

Enumerator
SPS_START 
SPS_RESET_LOW 
SPS_RESET_HIGH 
SPS_CONFIGURE_CONTROL_REGISTER 
SPS_TRIGGER_CURRENT_MEASUREMENT 
SPS_READ_MEASURED_CURRENT1 
SPS_READ_MEASURED_CURRENT2 
SPS_READ_MEASURED_CURRENT3 
SPS_READ_MEASURED_CURRENT4 
SPS_READ_EN_IRQ_PIN 

Definition at line 186 of file sps_cfg.h.

◆ SPS_WRITE_TYPE

enum SPS_WRITE_TYPE

spi block identification numbers

Enumerator
SPS_replaceCurrentValue 
SPS_orWithCurrentValue 
SPS_andWithCurrentValue 

Definition at line 153 of file sps_cfg.h.

Variable Documentation

◆ sps_channelStatus

SPS_CHANNEL_STATE_s sps_channelStatus[SPS_NR_OF_AVAILABLE_SPS_CHANNELS]
extern

channel states

Definition at line 63 of file sps_cfg.c.