foxBMS  1.2.0
The foxBMS Battery Management System API Documentation
spi_cfg.c
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41 
42 /**
43  * @file spi_cfg.c
44  * @author foxBMS Team
45  * @date 2020-03-05 (date of creation)
46  * @updated 2021-09-30 (date of last update)
47  * @ingroup DRIVERS_CONFIGURATION
48  * @prefix SPI
49  *
50  * @brief Configuration for the SPI module
51  *
52  *
53  *
54  */
55 
56 /*========== Includes =======================================================*/
57 #include "spi_cfg.h"
58 
59 /*========== Macros and Definitions =========================================*/
60 
61 /*========== Static Constant and Variable Definitions =======================*/
62 
63 /** @defgroup spi_data_format SPI data configuration structs
64  *
65  * These data configuration structs are used below in the
66  * #SPI_INTERFACE_CONFIG_s structures. Each data configuration structs refers
67  * to a format selection (e.g. SPI_FMT_0). These are defined in the HAL for
68  * each SPI channel (1-5). In order to limit potential confusion the data
69  * formats on SPI1 and SPI4 (the SPI interfaces that are routed to the
70  * interface board that contains the AFE) have to be configured the same.
71  * This way, the developer can switch between SPI1 and SPI4 without having to
72  * change the SPI data format.
73  *
74  * AFE | SPI data format
75  * ------- | ---------------
76  * LTC | SPI_FMT_0
77  * MXM | SPI_FMT_1
78  * NXP | SPI_FMT_2
79  * unused | SPI_FMT_3
80  *
81  * @{
82  */
83 
84 /** SPI data configuration struct for LTC communication */
85 static const spiDAT1_t spi_kLtcDataConfig = {
86  /* struct is implemented in the TI HAL and uses uppercase true and false */
87  .CS_HOLD = FALSE, /* The HW chip select signal is deactivated */
88  .WDEL = TRUE, /* No delay will be inserted */
89  .DFSEL = SPI_FMT_0, /* Data word format select: Data format 0 (SPI1) */
90  .CSNR = 0x0, /* Chip select (CS) number, 0x01h for CS[0] */
91 };
92 
93 /** SPI data configuration struct for MXM communication */
94 static const spiDAT1_t spi_kMxmDataConfig = {
95  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
96  .WDEL = TRUE, /*!< No delay will be inserted */
97  .DFSEL = SPI_FMT_1, /*!< Data word format select: Data format 1 (SPI1) */
98  .CSNR = 0x00, /*!< Chip select (CS) number, 0x01h for CS[0] */
99 };
100 
101 /** SPI data configuration struct for NXP MC33775A communication */
102 static const spiDAT1_t spi_kNxp775DataConfig = {
103  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
104  .WDEL = TRUE, /*!< No delay will be inserted */
105  .DFSEL = SPI_FMT_2, /*!< Data word format select */
106  .CSNR = 0x0, /*!< Chip select (CS) number, 0x01h for CS[0] */
107 };
108 
109 /** SPI data configuration struct for FRAM communication */
110 static const spiDAT1_t spi_kFramDataConfig = {
111  /* struct is implemented in the TI HAL and uses uppercase true and false */
112  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
113  .WDEL = TRUE, /*!< No delay will be inserted */
114  .DFSEL = SPI_FMT_1, /*!< Data word format select: data format 1 (SPI3) */
115  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
116 };
117 
118 /** SPI data configuration struct for SPS communication in low speed (4MHz) */
119 static const spiDAT1_t spi_kSpsDataConfigLowSpeed = {
120  /* struct is implemented in the TI HAL and uses uppercase true and false */
121  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
122  .WDEL = TRUE, /*!< No delay will be inserted */
123  .DFSEL = SPI_FMT_1, /*!< Data word format select: data format 1 (SPI2) */
124  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
125 };
126 
127 /** SPI data configuration struct for SPS communication in high speed (10MHz) */
128 static const spiDAT1_t spi_kSpsDataConfigHighSpeed = {
129  /* struct is implemented in the TI HAL and uses uppercase true and false */
130  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
131  .WDEL = TRUE, /*!< No delay will be inserted */
132  .DFSEL = SPI_FMT_2, /*!< Data word format select: data format 1 (SPI2) */
133  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
134 };
135 
136 /** SPI data configuration struct for ADC communication */
137 static const spiDAT1_t spi_kAdcDataConfig = {
138  /* struct is implemented in the TI HAL and uses uppercase true and false */
139  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
140  .WDEL = TRUE, /*!< No delay will be inserted */
141  .DFSEL = SPI_FMT_2, /*!< Data word format select: data format 2 (SPI3) */
142  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
143 };
144 
145 /** SPI configuration struct for SBC communication */
146 static const spiDAT1_t spi_kSbcDataConfig = {
147  /* struct is implemented in the TI HAL and uses uppercase true and false */
148  .CS_HOLD = FALSE, /*!< The HW chip select signal is deactivated */
149  .WDEL = TRUE, /*!< No delay will be inserted */
150  .DFSEL = SPI_FMT_0, /*!< Data word format select */
151  .CSNR = 0x0, /*!< Chip select (CS) number; 0x01h for CS[0] */
152 };
153 
154 /**@}*/
155 
156 /*========== Extern Constant and Variable Definitions =======================*/
157 /**
158  * SPI interface configuration for LTC communication
159  * This is a list of structs because of multistring
160  */
162  {
164  .pConfig = &spi_kLtcDataConfig,
165  .pNode = spiREG1,
166  .pGioPort = &(spiREG1->PC3),
167  .csPin = 2u,
168  },
169  {
170  .channel = SPI_Interface1,
171  .pConfig = &spi_kLtcDataConfig,
172  .pNode = spiREG1,
173  .pGioPort = &(spiREG1->PC3),
174  .csPin = 2u,
175  },
176  {
177  .channel = SPI_Interface1,
178  .pConfig = &spi_kLtcDataConfig,
179  .pNode = spiREG1,
180  .pGioPort = &(spiREG1->PC3),
181  .csPin = 2u,
182  },
183 };
184 
185 /** SPI interface configuration for MXM communication */
188  .pConfig = &spi_kMxmDataConfig,
189  .pNode = spiREG4,
190  .pGioPort = &(spiREG4->PC3),
191  .csPin = 0u,
192 };
193 
194 /** SPI interface configuration for N775 communication */
197  .pConfig = &spi_kNxp775DataConfig,
198  .pNode = spiREG1,
199  .pGioPort = &(spiREG1->PC3),
200  .csPin = 2u,
201 };
202 
203 /** SPI interface configuration for FRAM communication */
206  .pConfig = &spi_kFramDataConfig,
207  .pNode = spiREG3,
208  .pGioPort = &(spiREG3->PC3),
209  .csPin = 0u,
210 };
211 
212 /** SPI interface configuration for SPS communication */
215  .pConfig = &spi_kSpsDataConfigLowSpeed,
216  .pNode = spiREG2,
217  .pGioPort = &SPS_SPI_CS_GIOPORT,
218  .csPin = SPS_SPI_CS_PIN,
219 };
220 
221 /** SPI interface configuration for ADC communication */
224  .pConfig = &spi_kAdcDataConfig,
225  .pNode = spiREG3,
226  .pGioPort = &(spiREG3->PC3),
227  .csPin = 4u,
228 };
229 
230 /** SPI interface configuration for ADC communication */
233  .pConfig = &spi_kAdcDataConfig,
234  .pNode = spiREG3,
235  .pGioPort = &(spiREG3->PC3),
236  .csPin = 5u,
237 };
238 
239 /** SPI interface configuration for SBC communication */
242  .pConfig = &spi_kSbcDataConfig,
243  .pNode = spiREG2,
244  .pGioPort = &(spiREG2->PC3),
245  .csPin = 0u,
246 };
247 
248 /**
249  * @brief Variable used for SPI over DMA transmission. Retains the CS pin to
250  * deactivate in DMA callback
251  */
253  {
255  .pConfig = &spi_kLtcDataConfig,
256  .pNode = spiREG1,
257  .pGioPort = &(spiREG1->PC3),
258  .csPin = 2u,
259  },
260  {
261  .channel = SPI_Interface1,
262  .pConfig = &spi_kLtcDataConfig,
263  .pNode = spiREG1,
264  .pGioPort = &(spiREG1->PC3),
265  .csPin = 2u,
266  },
267  {
268  .channel = SPI_Interface1,
269  .pConfig = &spi_kLtcDataConfig,
270  .pNode = spiREG1,
271  .pGioPort = &(spiREG1->PC3),
272  .csPin = 2u,
273  },
274  {
275  .channel = SPI_Interface1,
276  .pConfig = &spi_kLtcDataConfig,
277  .pNode = spiREG1,
278  .pGioPort = &(spiREG1->PC3),
279  .csPin = 2u,
280  },
281  {
282  .channel = SPI_Interface1,
283  .pConfig = &spi_kLtcDataConfig,
284  .pNode = spiREG1,
285  .pGioPort = &(spiREG1->PC3),
286  .csPin = 2u,
287  },
288 };
289 
290 /**
291  * @details With DMA, only FMT0 can be used. This table stores the existing
292  * FMT0. The wanted FMT is then copied in FMT0. In the DMA callback,
293  * the existing FMT0 is restored with this table.
294  */
295 uint32_t spi_saveFmt0[] = {
296  0U,
297  0U,
298  0U,
299  0U,
300  0U,
301 };
302 
303 /** struct containing the lock state of the SPI interfaces */
305  SPI_IDLE,
306  SPI_IDLE,
307  SPI_IDLE,
308  SPI_IDLE,
309  SPI_IDLE,
310 };
311 
312 /** size of #spi_busyFlags */
313 const uint8_t spi_nrBusyFlags = sizeof(spi_busyFlags) / sizeof(SPI_BUSY_STATE_e);
314 
315 /*========== Static Function Prototypes =====================================*/
316 
317 /*========== Static Function Implementations ================================*/
318 
319 /*========== Extern Function Implementations ================================*/
321  FAS_ASSERT(pSpiSpsInterface != NULL_PTR);
322  pSpiSpsInterface->pConfig = &spi_kSpsDataConfigHighSpeed;
323 }
324 
326  FAS_ASSERT(pSpiSpsInterface != NULL_PTR);
327  pSpiSpsInterface->pConfig = &spi_kSpsDataConfigLowSpeed;
328 }
329 
330 /*========== Externalized Static Function Implementations (Unit Test) =======*/
#define BS_NR_OF_STRINGS
#define FAS_ASSERT(x)
Assertion macro that asserts that x is true.
Definition: fassert.h:237
#define NULL_PTR
Null pointer.
Definition: fstd_types.h:66
static const spiDAT1_t spi_kSpsDataConfigHighSpeed
Definition: spi_cfg.c:128
static const spiDAT1_t spi_kAdcDataConfig
Definition: spi_cfg.c:137
static const spiDAT1_t spi_kLtcDataConfig
Definition: spi_cfg.c:85
static const spiDAT1_t spi_kSbcDataConfig
Definition: spi_cfg.c:146
static const spiDAT1_t spi_kNxp775DataConfig
Definition: spi_cfg.c:102
static const spiDAT1_t spi_kMxmDataConfig
Definition: spi_cfg.c:94
static const spiDAT1_t spi_kFramDataConfig
Definition: spi_cfg.c:110
static const spiDAT1_t spi_kSpsDataConfigLowSpeed
Definition: spi_cfg.c:119
void SPI_SpsInterfaceSwitchToLowSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to low speed.
Definition: spi_cfg.c:325
SPI_INTERFACE_CONFIG_s spi_MxmInterface
Definition: spi_cfg.c:186
SPI_INTERFACE_CONFIG_s spi_dmaTransmission[]
Variable used for SPI over DMA transmission. Retains the CS pin to deactivate in DMA callback.
Definition: spi_cfg.c:252
SPI_INTERFACE_CONFIG_s spi_adc0Interface
Definition: spi_cfg.c:222
SPI_INTERFACE_CONFIG_s spi_kSbcMcuInterface
Definition: spi_cfg.c:240
SPI_BUSY_STATE_e spi_busyFlags[]
Definition: spi_cfg.c:304
SPI_INTERFACE_CONFIG_s spi_nxp775Interface
Definition: spi_cfg.c:195
SPI_INTERFACE_CONFIG_s spi_framInterface
Definition: spi_cfg.c:204
uint32_t spi_saveFmt0[]
Definition: spi_cfg.c:295
SPI_INTERFACE_CONFIG_s spi_adc1Interface
Definition: spi_cfg.c:231
void SPI_SpsInterfaceSwitchToHighSpeed(SPI_INTERFACE_CONFIG_s *pSpiSpsInterface)
Switch the SPS spi handle to high speed.
Definition: spi_cfg.c:320
SPI_INTERFACE_CONFIG_s spi_ltcInterface[BS_NR_OF_STRINGS]
Definition: spi_cfg.c:161
const uint8_t spi_nrBusyFlags
Definition: spi_cfg.c:313
SPI_INTERFACE_CONFIG_s spi_spsInterface
Definition: spi_cfg.c:213
Headers for the configuration for the SPI module.
@ SPI_IDLE
Definition: spi_cfg.h:93
#define SPS_SPI_CS_PIN
Definition: spi_cfg.h:75
enum SPI_BUSY_STATE SPI_BUSY_STATE_e
#define SPS_SPI_CS_GIOPORT
Definition: spi_cfg.h:73
@ SPI_Interface3
Definition: spi_cfg.h:101
@ SPI_Interface2
Definition: spi_cfg.h:100
@ SPI_Interface4
Definition: spi_cfg.h:102
@ SPI_Interface1
Definition: spi_cfg.h:99
const spiDAT1_t * pConfig
Definition: spi_cfg.h:109
SPI_INTERFACE_e channel
Definition: spi_cfg.h:108