61 #define FS8x_REG_ADDR_MASK 0x3FU
62 #define FS8x_REG_ADDR_SHIFT 0x01U
65 #define FS8x_I2C_READ_FRAME_LENGTH 1U
66 #define FS8x_I2C_ADDRESS_BASE 0x20U
67 #define FS8x_I2C_FRAME_SIZE 0x05U
68 #define FS8x_I2C_RX_SIZE 0x03U
71 #define FS8x_CRC_TBL_SIZE 256U
72 #define FS8x_COM_CRC_POLYNOM 0x1DU
73 #define FS8x_COM_CRC_INIT 0xFFU
81 0x00U, 0x1DU, 0x3AU, 0x27U, 0x74U, 0x69U, 0x4EU, 0x53U, 0xE8U, 0xF5U, 0xD2U, 0xCFU, 0x9CU,
82 0x81U, 0xA6U, 0xBBU, 0xCDU, 0xD0U, 0xF7U, 0xEAU, 0xB9U, 0xA4U, 0x83U, 0x9EU, 0x25U, 0x38U,
83 0x1FU, 0x02U, 0x51U, 0x4CU, 0x6BU, 0x76U, 0x87U, 0x9AU, 0xBDU, 0xA0U, 0xF3U, 0xEEU, 0xC9U,
84 0xD4U, 0x6FU, 0x72U, 0x55U, 0x48U, 0x1BU, 0x06U, 0x21U, 0x3CU, 0x4AU, 0x57U, 0x70U, 0x6DU,
85 0x3EU, 0x23U, 0x04U, 0x19U, 0xA2U, 0xBFU, 0x98U, 0x85U, 0xD6U, 0xCBU, 0xECU, 0xF1U, 0x13U,
86 0x0EU, 0x29U, 0x34U, 0x67U, 0x7AU, 0x5DU, 0x40U, 0xFBU, 0xE6U, 0xC1U, 0xDCU, 0x8FU, 0x92U,
87 0xB5U, 0xA8U, 0xDEU, 0xC3U, 0xE4U, 0xF9U, 0xAAU, 0xB7U, 0x90U, 0x8DU, 0x36U, 0x2BU, 0x0CU,
88 0x11U, 0x42U, 0x5FU, 0x78U, 0x65U, 0x94U, 0x89U, 0xAEU, 0xB3U, 0xE0U, 0xFDU, 0xDAU, 0xC7U,
89 0x7CU, 0x61U, 0x46U, 0x5BU, 0x08U, 0x15U, 0x32U, 0x2FU, 0x59U, 0x44U, 0x63U, 0x7EU, 0x2DU,
90 0x30U, 0x17U, 0x0AU, 0xB1U, 0xACU, 0x8BU, 0x96U, 0xC5U, 0xD8U, 0xFFU, 0xE2U, 0x26U, 0x3BU,
91 0x1CU, 0x01U, 0x52U, 0x4FU, 0x68U, 0x75U, 0xCEU, 0xD3U, 0xF4U, 0xE9U, 0xBAU, 0xA7U, 0x80U,
92 0x9DU, 0xEBU, 0xF6U, 0xD1U, 0xCCU, 0x9FU, 0x82U, 0xA5U, 0xB8U, 0x03U, 0x1EU, 0x39U, 0x24U,
93 0x77U, 0x6AU, 0x4DU, 0x50U, 0xA1U, 0xBCU, 0x9BU, 0x86U, 0xD5U, 0xC8U, 0xEFU, 0xF2U, 0x49U,
94 0x54U, 0x73U, 0x6EU, 0x3DU, 0x20U, 0x07U, 0x1AU, 0x6CU, 0x71U, 0x56U, 0x4BU, 0x18U, 0x05U,
95 0x22U, 0x3FU, 0x84U, 0x99U, 0xBEU, 0xA3U, 0xF0U, 0xEDU, 0xCAU, 0xD7U, 0x35U, 0x28U, 0x0FU,
96 0x12U, 0x41U, 0x5CU, 0x7BU, 0x66U, 0xDDU, 0xC0U, 0xE7U, 0xFAU, 0xA9U, 0xB4U, 0x93U, 0x8EU,
97 0xF8U, 0xE5U, 0xC2U, 0xDFU, 0x8CU, 0x91U, 0xB6U, 0xABU, 0x10U, 0x0DU, 0x2AU, 0x37U, 0x64U,
98 0x79U, 0x5EU, 0x43U, 0xB2U, 0xAFU, 0x88U, 0x95U, 0xC6U, 0xDBU, 0xFCU, 0xE1U, 0x5AU, 0x47U,
99 0x60U, 0x7DU, 0x2EU, 0x33U, 0x14U, 0x09U, 0x7FU, 0x62U, 0x45U, 0x58U, 0x0BU, 0x16U, 0x31U,
100 0x2CU, 0x97U, 0x8AU, 0xADU, 0xB0U, 0xE3U, 0xFEU, 0xD9U, 0xC4U
112 static uint8_t
FS8x_CalcCRC(
const uint8_t* data, uint8_t dataLen);
122 #if (FS8x_COMM_TYPE == FS8x_COMM_SPI || FS8x_COMM_TYPE == FS8x_COMM_BOTH)
140 #if (FS8x_COMM_TYPE == FS8x_COMM_I2C || FS8x_COMM_TYPE == FS8x_COMM_BOTH)
176 #if (FS8x_COMM_TYPE == FS8x_COMM_SPI || FS8x_COMM_TYPE == FS8x_COMM_BOTH)
205 rxData->
readData = (uint16_t)(rxFrame[2] << 8U | rxFrame[1]);
217 txFrame[3] |= txData->
isFailSafe ? 0x80U : 0x00U;
238 txFrame[2] = (uint8_t)(txData->
writeData >> 8);
239 txFrame[1] = (uint8_t)(txData->
writeData);
249 #if (FS8x_COMM_TYPE == FS8x_COMM_I2C || FS8x_COMM_TYPE == FS8x_COMM_BOTH)
264 i2cAddress = GetI2CAddress(drvData, txData);
285 rxFrame[4] = (uint8_t)((i2cAddress << 1U) | 0x01U);
292 rxData->
readData = (uint16_t)(rxFrame[2] << 8U | rxFrame[1]);
306 i2cAddress = GetI2CAddress(drvData, txData);
308 txFrame[4] = (uint8_t)(i2cAddress << 1U);
314 txFrame[2] = (uint8_t)(txData->
writeData >> 8);
315 txFrame[1] = (uint8_t)(txData->
writeData);
356 for (dataIdx = dataLen - 1; dataIdx > 0; dataIdx--)
358 tableIdx = crc ^ data[dataIdx];
391 .isFailSafe = isFailSafe };
398 #if FS8x_COMM_TYPE == FS8x_COMM_SPI || FS8x_COMM_TYPE == FS8x_COMM_BOTH
402 #if FS8x_COMM_TYPE == FS8x_COMM_I2C || FS8x_COMM_TYPE == FS8x_COMM_BOTH
404 return FS8x_I2C_ReadRegister(drvData, &txData, rxData);
413 uint8_t address, uint16_t writeData)
417 .writeData = writeData,
419 .isFailSafe = isFailSafe };
425 #if FS8x_COMM_TYPE == FS8x_COMM_SPI || FS8x_COMM_TYPE == FS8x_COMM_BOTH
429 #if FS8x_COMM_TYPE == FS8x_COMM_I2C || FS8x_COMM_TYPE == FS8x_COMM_BOTH
431 return FS8x_I2C_WriteRegister(drvData, &txData);
443 uint16_t writeDataInv;
451 addressNot = (uint8_t)(address + 1);
453 writeDataInv = (uint16_t)~writeData;
462 uint8_t address, int16_t mask, uint16_t writeData)
469 status =
FS8x_ReadRegister(pSpiInterface, drvData, isFailSafe, address, &rxTemp);
#define NULL
NULL definition.
fs8x_status_t FS8x_UpdateRegister(SPI_INTERFACE_CONFIG_s *pSpiInterface, fs8x_drv_data_t *drvData, bool isFailSafe, uint8_t address, int16_t mask, uint16_t writeData)
Performs update of a single register. It affects bits specified by a bit mask.
fs8x_status_t FS8x_WriteRegisterInit(SPI_INTERFACE_CONFIG_s *pSpiInterface, fs8x_drv_data_t *drvData, uint8_t address, uint16_t writeData)
Performs a write to a single FS8x FS init register (during the INIT_FS phase only).
fs8x_status_t FS8x_WriteRegister(SPI_INTERFACE_CONFIG_s *pSpiInterface, fs8x_drv_data_t *drvData, bool isFailSafe, uint8_t address, uint16_t writeData)
Sends write command to the FS8x.
fs8x_status_t FS8x_ReadRegister(SPI_INTERFACE_CONFIG_s *pSpiInterface, fs8x_drv_data_t *drvData, bool isFailSafe, uint8_t address, fs8x_rx_frame_t *rxData)
Performs a read from a single FS8x register.
fs8x_status_t
Status return codes.
fs8x_status_t MCU_SPI_TransferData(SPI_INTERFACE_CONFIG_s *pSpiInterface, uint8_t *txFrame, uint16_t frameLengthBytes, uint8_t *rxFrame)
This function transfers single frame through blocking SPI communication in both directions....
Assertion macro definition, for debugging purposes.
#define FS_ASSERT(x)
Assert macro for the SBC.
Driver common structures, enums, macros and configuration values.
#define FS8x_BO_SETVAL_EXT(data, value, mask, shift)
This macro updates value of bits specified by the mask. Additionally range check on the value is perf...
#define FS8x_BO_SETVAL(data, val, mask)
This macro updates value of bits specified by the mask. It is assumed that value is already shifted.
#define FS8x_CRC_TBL_SIZE
#define FS8x_COM_CRC_INIT
#define FS8x_I2C_FRAME_SIZE
static fs8x_status_t FS8x_CheckCRC(const uint8_t *data, uint8_t dataLen)
Performs CRC check of the data array.
#define FS8x_I2C_READ_FRAME_LENGTH
static uint8_t FS8x_CalcCRC(const uint8_t *data, uint8_t dataLen)
This function calculates CRC value of passed data array. Takes bytes in inverted order due to frame f...
#define FS8x_I2C_ADDRESS_BASE
#define FS8x_REG_ADDR_MASK
static const uint8_t FS8x_CRC_TABLE[FS8x_CRC_TBL_SIZE]
CRC lookup table.
#define FS8x_REG_ADDR_SHIFT
static fs8x_status_t FS8x_SPI_TransferData(SPI_INTERFACE_CONFIG_s *pSpiInterface, fs8x_tx_frame_t *txData, fs8x_rx_frame_t *rxData)
Performs SPI transfer of the txData. Received frame is saved into rxData structure.
static void FS8x_SPI_CreateSendFrame(fs8x_tx_frame_t *txData, uint8_t *txFrame)
Creates a raw frame for SPI transfer.
This file contains functions for SPI/I2C communication.
#define FS8x_COMM_FRAME_SIZE
This data structure is used by the FS8x driver (this is the first parameter of most the FS8x function...
fs8x_commType_t communicationMode
Actual communication mode (SPI or I2C). See fs8x_commType_t for details.
uint8_t i2cAddressOtp
SBC I2C address.
Structure representing received data frame.
uint16_t readData
Content of a read register.
uint8_t deviceStatus
A device status is returned into this byte after a successful transfer.
Structure representing transmit data frame.
fs8x_command_type_t commandType
Command type (R/W).
uint8_t registerAddress
Register address.
bool isFailSafe
Main/Fail Safe register selection.
uint16_t writeData
Data to be written to the register.