6.1.2. Interface LTC-6820 v1.0.3

6.1.2.1. Overview

Important

The following description only applies for the LTC LTC6820-based BMS-Interface Board hardware version 1.0.3.

Hint

All connector pinouts described below follow the Convention for Molex Micro-Fit 3.0 Connector Pin Numbering and Convention for Samtec Edge Rate connectors.

The BMS-Interface Board is used to enable communication between the BMS-Master Board and the BMS-Slave Boards. A 3D rendering of the BMS-Interface Board is shown in Fig. 6.1. The BMS-Interface Board is intended to be used together with a BMS-Master Board.

../../../_images/ltc-ltc6820-v1.0.3_rendering.png

Fig. 6.1 3D rendering of the BMS-Interface Board

6.1.2.2. Specifications

6.1.2.2.1. Mechanical Dimensions

The size of the PCB is 70 mm x 120 mm. A 3D-model and a drawing of the PCB can be found in section Design Resources.

6.1.2.2.2. isoSPI Insulation

The interface board is designed for a maximum continuous insulation voltage of 1250 V DC between all four isoSPI channels and between each isoSPI channel and the BMS-Master Board.

The insulation is designed according to DIN EN 60664-1:2008-01 under the following conditions:

  • Type of insulation: functional

  • Electrical field: homogeneous

  • Pollution degree: 2

  • PCB insulator class: 3b

  • Transient voltage: 4300 V DC

  • Continuous (working) voltage: 1250 V DC (selected due to design space constraints on PCB)

The PCB design complies with the following parameters:

  • Clearance: 1.3 mm

  • Creepage distance: 12.5 mm

6.1.2.2.3. Block Diagram

A block diagram of the BMS-Interface Board is shown in Fig. 6.2.

../../../_images/ltc-ltc6820-v1.0.3_block_diagram.png

Fig. 6.2 Block diagram of the BMS-Interface Board

Each of the four isoSPI channels uses one LTC LTC6820 communication chip from Analog Devices and an insulation transformer. The LTC LTC6820 chips are directly connected to the MCU via SPI.

6.1.2.2.4. Schematic and Board Layout

More information about the board schematic and layout files can be found in section Design Resources. For better debugging, there are test-points on the PCB for all relevant IO signals.

6.1.2.3. Functions

6.1.2.3.1. isoSPI communication

The BMS-Interface Board offers up to four isolated isoSPI communication channels using the LTC LTC6820 transceiver chip from Analog Devices. The LTC LTC6820 transceivers are controlled by the SPI signals from the BMS-Master Board. The isoSPI signals are available on the connectors J101, J102, J103 and J104. The pinout of these connectors is described in Table 6.1.

Table 6.1 isoSPI Daisy Chain Output Connectors

Pin

Signal

Description

1

isoSPI_P

isoSPI positive

2

isoSPI_N

isoSPI negative

For the connection to the BMS-Master Board, a 40-pole mezzanine connector (J100) is used. The pinout and pin usage is described in Table 6.2.

Table 6.2 Signal connector to BMS-Master Board

Pin

Signal

Description

Usage on BMS-Interface Board

1

MCU_SPI1.SOMI0

-

isoSPI channel 1/2

2

MCU_SPI1.SOMI1

-

-

3

MCU_SPI1.SIMO0

-

isoSPI channel 1/2

4

MCU_SPI1.SIMO1

-

-

5

MCU_SPI1.CLK

-

isoSPI channel 1/2

6

MCU_SPI1.CS1

-

isoSPI channel 1

7

MCU_SPI1.CS2

-

isoSPI channel 2

8

MCU_SPI1.CS3

-

-

9

MCU_SPI1.CS4

-

-

10

MCU_SPI1.CS5

-

-

11

MCU_SPI4.SOMI

-

isoSPI channel 3/4

12

MCU_SPI4.SIMO

-

isoSPI channel 3/4

13

MCU_SPI4.CLK

-

isoSPI channel 3/4

14

MCU_SPI4.CS0

-

isoSPI channel 3

15

MCU_SPI4.CS1

-

isoSPI channel 4

16

MCU_SPI4.CS2

-

-

17

MCU_SPI4.CS3

-

-

18

MCU_SPI4.CS4

-

-

19

MCU_SPI4.CS5

-

-

20

IF_INT0

Interrupt pin, connected to MCU GIOA_2

-

21

IF_INT1

Interrupt pin, connected to MCU GIOA_3

-

22

IF_INT2

Interrupt pin, connected to MCU GIOA_4

-

23

IF_INT3

Interrupt pin, connected to MCU GIOA_6

-

24

IF_GPIO.0

GPIO pin, connected to port expander 3 IO1_0

isoSPI channel 1 LTC LTC6820 enable

25

IF_GPIO.1

GPIO pin, connected to port expander 3 IO1_1

isoSPI channel 1 LTC LTC6820 master

26

IF_GPIO.2

GPIO pin, connected to port expander 3 IO1_2

isoSPI channel 2 LTC LTC6820 enable

27

IF_GPIO.3

GPIO pin, connected to port expander 3 IO1_3

isoSPI channel 2 LTC LTC6820 master

28

IF_GPIO.4

GPIO pin, connected to port expander 3 IO1_4

isoSPI channel 3 LTC LTC6820 enable

29

IF_GPIO.5

GPIO pin, connected to port expander 3 IO1_5

isoSPI channel 3 LTC LTC6820 master

30

IF_GPIO.6

GPIO pin, connected to port expander 3 IO1_6

isoSPI channel 4 LTC LTC6820 enable

31

IF_GPIO.7

GPIO pin, connected to port expander 3 IO1_7

isoSPI channel 4 LTC LTC6820 master

32

GND

Power supply ground

Power supply ground

33

GND

Power supply ground

Power supply ground

34

PER_3.3V

3.3 V from peripheral SBC

3.3 V power supply

35

PER_3.3V

3.3 V from peripheral SBC

3.3 V power supply

36

PER_5.0V

5.0 V from peripheral SBC

-

37

PER_5.0V

5.0 V from peripheral SBC

-

38

VBB_12V

12 V from buck-boost converter

-

39

VSUP

Master supply voltage (after protection circuits)

-

40

VSUP

Master supply voltage (after protection circuits)

-